Difference between revisions of "L0I"
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Level 0 Instruction Cache is accessed from the processor with only reads. It is a blocking cache. A miss blocks all the newer requests. While there is a miss, incoming requests are buffered and replayed later by the cache. | Level 0 Instruction Cache is accessed from the processor with only reads. It is a blocking cache. A miss blocks all the newer requests. While there is a miss, incoming requests are buffered and replayed later by the cache. | ||
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Revision as of 20:13, 30 May 2009
Functionality Description
Level 0 Instruction Cache is accessed from the processor with only reads. It is a blocking cache. A miss blocks all the newer requests. While there is a miss, incoming requests are buffered and replayed later by the cache.
