Difference between revisions of "Relay"

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(Created page with 'module relay (c1, c2, pin, nin) ; inout c1, c2 ; input pin, nin electrical c1, c2, pin, nin; parameter real r=1 ; analog begin @(cross(V(pin,nin))) discontinuity(0) ; if (V(pi…')
 
 
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module relay (c1, c2, pin, nin) ;
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`include "discipline.h" <br />
inout c1, c2 ;  
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`include "constants.h" <br />
input pin, nin  
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module relay (c1, c2, pin, nin);
electrical c1, c2, pin, nin;  
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inout c1, c2;<br />
parameter real r=1 ;
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input pin, nin;<br />
analog begin @(cross(V(pin,nin))) discontinuity(0) ;
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electrical c1, c2, pin, nin;  
if (V(pin,nin) >= 0)
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parameter real r=1 ;
I(c1,c2) <+ V(c1,c2)/r;  
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analog begin @(cross(V(pin,nin))) discontinuity(0) ; <br />
else
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if (V(pin,nin) >= 0)<br />
end endmodule
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I(c1,c2) <+ V(c1,c2)/r; <br />
 +
else
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I(c1,c2) <+ 0 ;
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end endmodule
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 +
example from http://www.eda.org/verilog-ams/htmlpages/public-docs/lrm/VerilogA/verilog-a-lrm-1-0.pdf

Latest revision as of 00:19, 13 November 2009

`include "discipline.h" 
`include "constants.h"
module relay (c1, c2, pin, nin); inout c1, c2;
input pin, nin;
electrical c1, c2, pin, nin; parameter real r=1 ; analog begin @(cross(V(pin,nin))) discontinuity(0) ;
if (V(pin,nin) >= 0)
I(c1,c2) <+ V(c1,c2)/r;
else I(c1,c2) <+ 0 ; end endmodule

example from http://www.eda.org/verilog-ams/htmlpages/public-docs/lrm/VerilogA/verilog-a-lrm-1-0.pdf