Difference between revisions of "ESESC Power"

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Revision as of 00:37, 5 February 2010

McPAT performance Counters

1. ICache Counters
# Counter Name
1 total_accesses
2 read_accesses
3 read_misses
4 replacements (find an equivalent in the WB from esesc)
5 read_hits
6 total_hits
7 total_misses
8 miss_buffer_accesses
9 fill_buffer_accesses
10 prefetch_buffer_accesses
12 prefetch_buffer_hits
13 prefetch_buffer_writes
14 prefetch_buffer_reads


2. Branch Predictor Counter
# Counter Name
1 predictor_accesses


3. i-TLB
# Counter Name
1 total_hits
2 total_accesses
3 total_misses


4. Data TLB
# Counter Name
1 total_accesses
2 read_accesses
3 write_accesses
4 write_hits
5 read_hits
6 total_hits
7 read_misses
8 write_misses
9 total_misses


5. Data Cache
# Counter Name
1 total_accesses
2 read_accesses
3 write_accesses
4 write_hits
5 read_hits
6 total_hits
7 read_misses
8 write_misses
9 total_misses
10 prefetch_buffer_accesses
12 prefetch_buffer_hits
13 prefetch_buffer_writes
14 prefetch_buffer_reads
15 replacements
16 write_backs
17 miss_buffer_accesses
18 fill_buffer_accesses
19 wbb_writes
20 wbb_reads


6. Branch Target Buffer - BTB
# Counter Name
1 total_accesses
2 read_accesses
3 write_accesses
4 write_hits
5 read_hits
6 total_hits
7 read_misses
8 write_misses
9 total_misses
10 replacement


7. Core
# Counter Name
1 instruction_buffer_reads
2 instruction_buffer_writes
3 ROB_reads
4 ROB_writes
5 rename_accesses
6 inst_window_reads
7 inst_window_writes
8 inst_window_wakeup_access
9 inst_window_selections
10 archi_int_regfile_reads
11 archi_float_regfile_reads
12 phy_int_regfile_reads
13 phy_float_regfile_reads
14 phy_int_regfile_writes
15 phy_float_regfile_writes
16 archi_int_regfile_writes
17 archi_float_regfile_writes
18 windowed_reg_accesses
19 windowed_reg_transports
20 ialu_access
21 fpu_access
22 bypassbus_access
23 load_buffer_reads
24 load_buffer_writes
25 store_buffer_reads
26 store_buffer_writes
27 store_buffer_forwards
28 main_memory_access
29 main_memory_write


8. L2 Directory
# Counter Name
1 total_accesses
2 read_accesses
3 write_accesses


9. L2
# Counter Name
1 total_accesses
2 read_accesses
3 write_accesses
4 total_hits
5 total_misses
6 read_hits
7 write_hits
8 read_misses
9 write_misses
10 replacement
11 write_backs
12 miss_buffer_accesses
13 fill_buffer_accesses
14 prefetch_buffer_accesses
15 prefetch_buffer_writes
16 prefetch_buffer_reads
17 prefetch_buffer_hits
18 wbb_writes
19 wbb_reads


10. L3
# Counter Name
1 total_accesses
2 read_accesses
3 write_accesses
4 total_hits
5 total_misses
6 read_hits
7 write_hits
8 read_misses
9 write_misses
10 replacement
11 write_backs
12 miss_buffer_accesses
13 fill_buffer_accesses
14 prefetch_buffer_accesses
15 prefetch_buffer_writes
16 prefetch_buffer_reads
17 prefetch_buffer_hits
18 wbb_writes
19 wbb_reads


11. Memory
# Counter Name
1 memory_accesses
2 memory_reads
3 memory_writes
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