Difference between revisions of "FPGA Tutorials"
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| − | This page contains links to the data sheets and reference manuals for the parts and software we will be using. Please don't print them out; this will waste paper. | + | This page contains links to the data sheets and reference manuals for the parts and software we will be using. They were originally created by [http://users.soe.ucsc.edu/~martine/ Prof. Martine Schlag]. |
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| + | Please don't print them out; this will waste paper. | ||
== Hardware == | == Hardware == | ||
| − | + | [[File:basys_top.jpg]] | |
| − | * BASYS Board Reference Manual | + | We will be using the Digilent BASYS Board |
| − | * BASYS Board Schematic | + | (shown above) which uses a Xilinx [https://courses.soe.ucsc.edu/courses/cmpe100/Spring12/01/pages/lab-resources/ds-spartan3100e.pdf Spartan 3E FPGA]. |
| + | |||
| + | * [http://www.digilentinc.com/Data/Products/BASYS/BASYS_E_RM.pdf BASYS Board Reference Manual] | ||
| + | * [http://www.digilentinc.com/Data/Products/BASYS/BASYS_C_sch.pdf BASYS Board Schematic] | ||
== Software == | == Software == | ||
| − | |||
| − | + | We will be using the Xilinx ISE WebPack 9.2i(free). The most current version is ISE WebPack 12.3, so make sure you download 9.2i rather than 12.x, 11.x or 10.x!!! You'll need a fast connection to download these tools. | |
| − | + | You can download this software(free) from the [http://www.xilinx.com/support/download/index.htm Xilinx ISE 9.2i Webpack] page. Click on archive and then select 9.2. You will need both the 9.2 Webpack and the 9.2SP4 Service Pack. | |
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| − | + | #Register for a Xilinx account (painless). | |
| + | #Fill out the survey. | ||
| + | #They will e-mail you a password. After logging in go back to [http://www.xilinx.com/support/download/index.htm Xilinx ISE 9.2i Webpack] page. | ||
| + | #Select the Webinstall version | ||
| + | #To speed up the installation don't install the Cable Drivers, and only install the set of parts including the Spartan 3E series. | ||
| + | #You then need to go back and get the ISE Service Pack 4 for ISE 9.2i from [http://www.xilinx.com/support/download/index.htm Xilinx ISE 9.2i Webpack] page (link in the shaded region). | ||
| − | + | This software is already installed on the machines in BE104. Please note that you may not use Xilinx's Customer Support if you encounter a problem (this is a condition of the use of this software). The instructors and TAs can offer limited help installing the software. Use Windows 7 at your own risk. | |
== Instructions == | == Instructions == | ||
| + | |||
| + | These are industrial strength tools. We will guide you through their use, keeping things as simple as possible. You are welcome to explore other features of the tools, but make sure to save your work first! | ||
Instructions for: | Instructions for: | ||
| − | * [[Downloading a bit | + | * [[Downloading a configuration (.bit) file to the FPGA on the Basys board]] |
| − | * Creating a new project | + | * [[Creating a new project]] |
| − | * Archiving and storing your ISE project | + | * [[Archiving and storing your ISE project]] |
| − | * Entering a schematic | + | * [[Entering a schematic]] |
| − | * Creating a schematic symbol | + | * [[Creating a schematic symbol]] |
| − | * Simulating | + | * [[Simulating a design with ISE Simulator]] |
| − | * Using buses in a schematic | + | * [[Using buses in a schematic]] |
| − | * Using Verilog to describe | + | * [[Using Verilog to describe combinational logic]] |
| − | * Implementing State Machines using Verilog for the logic | + | * [[Implementing State Machines using Verilog for the logic]] |
Other links: | Other links: | ||
| − | * Resistor color | + | * [[Resistor color codes]] |
| − | * | + | * [[Scope Setup and Calibration]] |
| − | * Common problems | + | * [[Common problems]] |
The CMPE100 Web: | The CMPE100 Web: | ||
| − | Copyright | + | Copyright 2012; Department of Computer Engineering, University of California, Santa Cruz. |
Latest revision as of 18:36, 27 March 2012
This page contains links to the data sheets and reference manuals for the parts and software we will be using. They were originally created by Prof. Martine Schlag.
Please don't print them out; this will waste paper.
Hardware
We will be using the Digilent BASYS Board (shown above) which uses a Xilinx Spartan 3E FPGA.
Software
We will be using the Xilinx ISE WebPack 9.2i(free). The most current version is ISE WebPack 12.3, so make sure you download 9.2i rather than 12.x, 11.x or 10.x!!! You'll need a fast connection to download these tools.
You can download this software(free) from the Xilinx ISE 9.2i Webpack page. Click on archive and then select 9.2. You will need both the 9.2 Webpack and the 9.2SP4 Service Pack.
- Register for a Xilinx account (painless).
- Fill out the survey.
- They will e-mail you a password. After logging in go back to Xilinx ISE 9.2i Webpack page.
- Select the Webinstall version
- To speed up the installation don't install the Cable Drivers, and only install the set of parts including the Spartan 3E series.
- You then need to go back and get the ISE Service Pack 4 for ISE 9.2i from Xilinx ISE 9.2i Webpack page (link in the shaded region).
This software is already installed on the machines in BE104. Please note that you may not use Xilinx's Customer Support if you encounter a problem (this is a condition of the use of this software). The instructors and TAs can offer limited help installing the software. Use Windows 7 at your own risk.
Instructions
These are industrial strength tools. We will guide you through their use, keeping things as simple as possible. You are welcome to explore other features of the tools, but make sure to save your work first!
Instructions for:
- Downloading a configuration (.bit) file to the FPGA on the Basys board
- Creating a new project
- Archiving and storing your ISE project
- Entering a schematic
- Creating a schematic symbol
- Simulating a design with ISE Simulator
- Using buses in a schematic
- Using Verilog to describe combinational logic
- Implementing State Machines using Verilog for the logic
Other links:
The CMPE100 Web:
Copyright 2012; Department of Computer Engineering, University of California, Santa Cruz.
