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| − | == McPAT performance Counters ==
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| − | {| class="wikitable" border="0"
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| − | |-
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| − | ! ICache
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| − | |-
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| − | | total_accesses
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| − | |-
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| − | | read_accesses
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| − | |-
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| − | | read_misses
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| − | |-
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| − | | replacements (find an equivalent in the WB from esesc)
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| − | |-
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| − | | read_hits
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| − | |-
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| − | | total_hits
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| − | |-
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| − | | total_misses
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| − | |-
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| − | | miss_buffer_accesses
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| − | |-
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| − | | fill_buffer_accesses
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| − | |-
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| − | | prefetch_buffer_accesses
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| − | |-
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| − | | prefetch_buffer_hits
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| − | |-
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| − | | prefetch_buffer_writes
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| − | |-
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| − | | prefetch_buffer_reads
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| − | |}
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| − |
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| − |
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| − |
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| − | 2. Branch Predictor
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| − | 1. predictor_accesses
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| − | 3. i-TLB
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| − | 1. total_hits
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| − | 2. total_accesses
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| − | 3. total_misses
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| − |
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| − | 4. Data TLB
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| − | 1. total_accesses
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| − | 2. read_accesses
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| − | 3. write_accesses
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| − | 4. write_hits
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| − | 5. read_hits
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| − | 6. read_misses
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| − | 7. write_misses
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| − | 8. total_hits
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| − | 9. total_misses
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| − |
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| − | 5. Data Cache
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| − | 1. total_accesses
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| − | 2. read_accesses
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| − | 3. write_accesses
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| − | 4. total_hits
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| − | 5. total_misses
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| − | 6. read_hits
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| − | 7. write_hits
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| − | 8. read_misses
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| − | 9. write_misses
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| − | 10. replacements
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| − | 11. write_backs
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| − | 12. miss_buffer_accesses
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| − | 13. fill_buffer_accesses
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| − | 14. prefetch_buffer_accesses
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| − | 15. prefetch_buffer_hits
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| − | 16. prefetch_buffer_writes
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| − | 17. prefetch_buffer_rea
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| − | 18. wbb_writes
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| − | 19. wbb_reads
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| − |
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| − | 6. BTB
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| − | 1. total_accesses
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| − | 2. read_accesses
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| − | 3. write_accesses
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| − | 4. total_hits
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| − | 5. total_misses
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| − | 6. read_hits
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| − | 7. write_hits
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| − | 8. read_misses
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| − | 9. write_misses
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| − | 10. replacement
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| − |
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| − | 7. Core
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| − | 1. instruction_buffer_reads *
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| − | 2. instruction_buffer_writes *
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| − | 3. ROB_reads *
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| − | 4. ROB_writes *
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| − | 5. rename_accesses *
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| − | 6. inst_window_reads *
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| − | 7. inst_window_writes *
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| − | 8. inst_window_wakeup_access *
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| − | 9. inst_window_selections *
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| − |
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| − | //floating point arch/phys is missing in esesc
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| − | 10. archi_int_regfile_reads
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| − | 11. archi_int_regfile_reads
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| − | 12. phy_int_regfile_reads
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| − | 13. phy_float_regfile_reads *
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| − | 14. phy_int_regfile_writes
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| − | 15. phy_float_regfile_writes *
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| − | 16. archi_int_regfile_writes
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| − | 17. archi_float_regfile_writes *
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| − |
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| − | 18. windowed_reg_accesses *
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| − | 19. windowed_reg_transports *
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| − | 20. ialu_access *
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| − | 21. fpu_access *
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| − | 22. bypassbus_access =? writeFwdBus
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| − | 23. load_buffer_reads *
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| − | 24. load_buffer_writes *
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| − | 25. store_buffer_reads *
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| − | 26. store_buffer_writes *
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| − | 27. store_buffer_forwards *
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| − | 28. main_memory_access
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| − | 29. main_memory_write
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| − |
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| − | 8. L2 Directory
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| − | 1. total_accesses
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| − | 2. read_accesses
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| − | 3. write_accesses
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| − |
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| − | 9. L2
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| − | 1. total_accesses
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| − | 2. read_accesses
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| − | 3. write_accesses
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| − | 4. total_hits
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| − | 5. total_misses
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| − | 6. read_hits
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| − | 7. write_hits
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| − | 8. read_misses
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| − | 9. write_misses
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| − | 10. repalcement
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| − | 11. write_backs
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| − | 12. miss_buffer_accesses
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| − | 13. fill_buffer_accesses
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| − | 14. prefetch_buffer_accesses
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| − | 15. prefetch_buffer_writes
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| − | 16. prefetch_buffer_reads
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| − | 17. prefetch_buffer_hits
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| − | 18. wbb_writes
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| − | 19. wbb_reads
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| − | 10. L3
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| − | 1. total_accesses
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| − | 2. read_accesses
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| − | 3. write_accesses
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| − | 4. total_hits
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| − | 5. total_misses
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| − | 6. read_hits
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| − | 7. write_hits
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| − | 8. read_misses
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| − | 9. write_misses
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| − | 10. repalcement
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| − | 11. write_backs
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| − | 12. miss_buffer_accesses
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| − | 13. fill_buffer_accesses
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| − | 14. prefetch_buffer_accesses
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| − | 15. prefetch_buffer_writes
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| − | 16. prefetch_buffer_reads
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| − | 17. prefetch_buffer_hits
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| − | 18. wbb_writes
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| − | 19. wbb_reads
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| − |
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| − | 12. memory
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| − | 1. memory_accesses
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| − | 2. memory_reads
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| − | 3. memory_writes
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