Difference between revisions of "Standard-Cell Tutorials"
From Vlsiwiki
| (10 intermediate revisions by 3 users not shown) | |||
| Line 1: | Line 1: | ||
| − | # [[ | + | |
| − | # [[ | + | # [[Simulating Verilog]]<BR> |
| + | # [[Cadence Encounter]]<BR> | ||
| + | # [[Hierarchical Design and Floorplanning]] | ||
For other tutorials, please see the [http://avatar.ecen.okstate.edu/wiki/index.php/Tutorials#Cadence OSU wiki]. | For other tutorials, please see the [http://avatar.ecen.okstate.edu/wiki/index.php/Tutorials#Cadence OSU wiki]. | ||
Latest revision as of 00:23, 28 May 2015
For other tutorials, please see the OSU wiki.
