Difference between revisions of "280G F12"
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| 1/16/13 | | 1/16/13 | ||
| Rafael | | Rafael | ||
| − | | | + | | [http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=4476508 Resonant-Clock Latch-Based Design] |
| + | [http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=5325961 A Resonant Clock 200MHz ARM926EJ-STM Microcontroller] | ||
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| 1/23/13 | | 1/23/13 | ||
| Jeff | | Jeff | ||
| − | | | + | | [http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=1471287 A low-power SRAM with resonantly powered data, address, word, and bit lines] |
| + | |||
|- | |- | ||
| 1/30/13 | | 1/30/13 | ||
| Nihan | | Nihan | ||
| + | |[http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=06178290 Distributed LC resonant clock grid synthesis] | ||
| + | [http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=06241503 Library-aware resonant clock synthesis] | ||
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''' Resonant Papers:''' | ''' Resonant Papers:''' | ||
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[http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=4261012 Jitter Characteristic in Charge Recovery Resonant Clock Distribution], | [http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=4261012 Jitter Characteristic in Charge Recovery Resonant Clock Distribution], | ||
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[http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=4735565 A Resonant Global Clock Distribution for the Cell Broadband Engine Processor] | [http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=4735565 A Resonant Global Clock Distribution for the Cell Broadband Engine Processor] | ||
Latest revision as of 21:25, 24 January 2013
This quarter, we will put a focus on resonant and non-traditional clocking. We will have two presenters each day -- about 30-40 min each. Please select papers on either distributed/monolithic LC, rotary clocking, or standing wave clocking or similar non-traditional clocking papers.
| Date | Presenter | Topic/Paper | |
|---|---|---|---|
| 1/16/13 | Rafael | Resonant-Clock Latch-Based Design | |
| 1/23/13 | Jeff | A low-power SRAM with resonantly powered data, address, word, and bit lines | |
| 1/30/13 | Nihan | Distributed LC resonant clock grid synthesis | |
| 2/6/13 | |||
| 2/13/13 | |||
| 2/20/13 | |||
| 2/27/13 | |||
| 3/6/13 | |||
| 3/13/13 | None |
Resonant Papers:
Jitter Characteristic in Charge Recovery Resonant Clock Distribution,
A Resonant Global Clock Distribution for the Cell Broadband Engine Processor
Rotary traveling-wave oscillator arrays: A new clock technology
These might be related: Custom Rotary Clock Router, Custom topology rotary clock router with tree subnetworks
1.56 GHz On-chip Resonant Clocking in 130nm CMOS
1.1 to 1.6GHz Distributed Differential Oscillator Global Clock Network
These two would go together: Distributed LC resonant clock tree synthesis, A methodology for local resonant clock synthesis using lc-assisted local clock buffers
Distributed LC resonant clock grid synthesis
Library-aware resonant clock synthesis
These might be related:
A 4.6GHz resonant global clock distribution network,
Design of resonant global clock distributions,
Uniform-phase uniform-amplitude resonant-load global clock distributions,
A Resonant Global Clock Distribution for the Cell Broadband Engine Processor
Implementing multiphase resonant clocking on a finite-impulse response filter
