Difference between revisions of "ESESC Power"

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Line 310: Line 310:
 
!  10  
 
!  10  
 
| archi_int_regfile_reads
 
| archi_int_regfile_reads
 +
|- style="background:aliceblue; color:black"
 +
!  11
 +
| archi_float_regfile_reads
 
|- style="background:aliceblue; color:black"
 
|- style="background:aliceblue; color:black"
 
!  12  
 
!  12  
| archi_int_regfile_reads
+
| phy_int_regfile_reads
 
|- style="background:aliceblue; color:black"
 
|- style="background:aliceblue; color:black"
 
!  13  
 
!  13  
| phy_int_regfile_reads
+
| phy_float_regfile_reads
 
|- style="background:aliceblue; color:black"
 
|- style="background:aliceblue; color:black"
 
!  14  
 
!  14  
| phy_float_regfile_reads
 
|- style="background:aliceblue; color:black"
 
!  15
 
 
| phy_int_regfile_writes
 
| phy_int_regfile_writes
 
|- style="background:aliceblue; color:black"
 
|- style="background:aliceblue; color:black"
16
+
15
 
| phy_float_regfile_writes
 
| phy_float_regfile_writes
 
|- style="background:aliceblue; color:black"
 
|- style="background:aliceblue; color:black"
17
+
16
 
| archi_int_regfile_writes
 
| archi_int_regfile_writes
 
|- style="background:aliceblue; color:black"
 
|- style="background:aliceblue; color:black"
18
+
17
 
| archi_float_regfile_writes
 
| archi_float_regfile_writes
 
|- style="background:aliceblue; color:black"
 
|- style="background:aliceblue; color:black"
19
+
18
 
| windowed_reg_accesses
 
| windowed_reg_accesses
 
|- style="background:aliceblue; color:black"
 
|- style="background:aliceblue; color:black"
20
+
19
 
| windowed_reg_transports
 
| windowed_reg_transports
 
|- style="background:aliceblue; color:black"
 
|- style="background:aliceblue; color:black"
21
+
20
 
| ialu_access
 
| ialu_access
 
|- style="background:aliceblue; color:black"
 
|- style="background:aliceblue; color:black"
22
+
21
 
| fpu_access
 
| fpu_access
 
|- style="background:aliceblue; color:black"
 
|- style="background:aliceblue; color:black"
23
+
22
 
| bypassbus_access
 
| bypassbus_access
 
|- style="background:aliceblue; color:black"
 
|- style="background:aliceblue; color:black"
24
+
23
 
| load_buffer_reads
 
| load_buffer_reads
 
|- style="background:aliceblue; color:black"
 
|- style="background:aliceblue; color:black"
25
+
24
 
| load_buffer_writes
 
| load_buffer_writes
 
|- style="background:aliceblue; color:black"
 
|- style="background:aliceblue; color:black"
26
+
25
 
| store_buffer_reads
 
| store_buffer_reads
 
|- style="background:aliceblue; color:black"
 
|- style="background:aliceblue; color:black"
27
+
26
 
| store_buffer_writes
 
| store_buffer_writes
 
|- style="background:aliceblue; color:black"
 
|- style="background:aliceblue; color:black"
28
+
27
 
| store_buffer_forwards
 
| store_buffer_forwards
 
|- style="background:aliceblue; color:black"
 
|- style="background:aliceblue; color:black"
29
+
28
 
| main_memory_access
 
| main_memory_access
 
|- style="background:aliceblue; color:black"
 
|- style="background:aliceblue; color:black"
Line 368: Line 368:
 
| main_memory_write
 
| main_memory_write
 
|}
 
|}
7. Core
+
 
  
 
2.  *
 
2.  *

Revision as of 00:21, 5 February 2010

McPAT performance Counters

ICache Counters
# Counter Name
1 total_accesses
2 read_accesses
3 read_misses
4 replacements (find an equivalent in the WB from esesc)
5 read_hits
6 total_hits
7 total_misses
8 miss_buffer_accesses
9 fill_buffer_accesses
10 prefetch_buffer_accesses
12 prefetch_buffer_hits
13 prefetch_buffer_writes
14 prefetch_buffer_reads


Branch Predictor Counter
# Counter Name
1 predictor_accesses


i-TLB
# Counter Name
1 total_hits
2 total_accesses
3 total_misses


Branch Predictor Counter
# Counter Name
1 total_accesses
2 read_accesses
3 write_accesses
4 write_hits
5 read_hits
6 total_hits
7 read_misses
8 write_misses
9 total_misses


Data TLB
# Counter Name
1 total_accesses
2 read_accesses
3 write_accesses
4 write_hits
5 read_hits
6 total_hits
7 read_misses
8 write_misses
9 total_misses


Data Cache
# Counter Name
1 total_accesses
2 read_accesses
3 write_accesses
4 write_hits
5 read_hits
6 total_hits
7 read_misses
8 write_misses
9 total_misses
10 prefetch_buffer_accesses
12 prefetch_buffer_hits
13 prefetch_buffer_writes
14 prefetch_buffer_reads
15 replacements
16 write_backs
17 miss_buffer_accesses
18 fill_buffer_accesses
19 wbb_writes
20 wbb_reads


Branch Target Buffer - BTB
# Counter Name
1 total_accesses
2 read_accesses
3 write_accesses
4 write_hits
5 read_hits
6 total_hits
7 read_misses
8 write_misses
9 total_misses
10 replacement


Core
# Counter Name
1 instruction_buffer_reads
2 instruction_buffer_writes
3 ROB_reads
4 ROB_writes
5 rename_accesses
6 inst_window_reads
7 inst_window_writes
8 inst_window_wakeup_access
9 inst_window_selections
10 archi_int_regfile_reads
11 archi_float_regfile_reads
12 phy_int_regfile_reads
13 phy_float_regfile_reads
14 phy_int_regfile_writes
15 phy_float_regfile_writes
16 archi_int_regfile_writes
17 archi_float_regfile_writes
18 windowed_reg_accesses
19 windowed_reg_transports
20 ialu_access
21 fpu_access
22 bypassbus_access
23 load_buffer_reads
24 load_buffer_writes
25 store_buffer_reads
26 store_buffer_writes
27 store_buffer_forwards
28 main_memory_access
29 main_memory_write


2. * 3. * 4. * 5. * 6. * 7. * 8. * 9. *

//floating point arch/phys is missing in esesc 10. 11. 12. 13. x * 14. 15. * 16. 17. *

18. * 19. * 20. * 21. * 22.

Branch Predictor Counter

8. L2 Directory 1. total_accesses 2. read_accesses 3. write_accesses

Branch Predictor Counter

9. L2 1. total_accesses 2. read_accesses 3. write_accesses 4. total_hits{| class="wikitable" style="border:0; width:600pt; height:2pt" |- style="background:lightgray; text-align:left;" ! Branch Predictor Counter |} 5. total_misses 6. read_hits 7. write_hits 8. read_misses 9. write_misses 10. repalcement 11. write_backs{| class="wikitable" style="border:0; width:600pt; height:2pt" |- style="background:lightgray; text-align:left;" ! Branch Predictor Counter |} 12. miss_buffer_accesses 13. fill_buffer_accesses 14. prefetch_buffer_accesses 15. prefetch_buffer_writes 16. prefetch_buffer_reads 17. prefetch_buffer_hits 18. wbb_writes 19. wbb_reads


Branch Predictor Counter

10. L3 1. total_accesses 2. read_accesses 3. write_accesses 4. total_hits 5. total_misses 6. read_hits 7. write_hits 8. read_misses 9. write_misses 10. repalcement 11. write_backs 12. miss_buffer_accesses 13. fill_buffer_accesses 14. prefetch_buffer_accesses 15. prefetch_buffer_writes 16. prefetch_buffer_reads 17. prefetch_buffer_hits 18. wbb_writes 19. wbb_reads

Branch Predictor Counter

12. memory 1. memory_accesses 2. memory_reads 3. memory_writes