Difference between revisions of "280G F12"

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[http://www.eecs.umich.edu/eecs/about/articles/2012/ISSCC_2012_Piledriver_final_submission.pdf Resonant Clock Design for a Power-Efficient High-Volume x86-64 Microprocessor]
 
[http://www.eecs.umich.edu/eecs/about/articles/2012/ISSCC_2012_Piledriver_final_submission.pdf Resonant Clock Design for a Power-Efficient High-Volume x86-64 Microprocessor]
  
A. Ishii, et al., “[http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=5325961 A Resonant Clock 200MHz ARM926EJ-STM Microcontroller],” European Solid-State Circuits Conf., pp. 356-359, 2009.
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[http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=5325961 A Resonant Clock 200MHz ARM926EJ-STM Microcontroller]
  
WOOD, J., EDWARDS, T. C., AND LIPA, S. 2001. [http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=962285 Rotary traveling-wave oscillator arrays: A new clock tech- nology] . Journal of Solid-State Circuits (JSSC) 36, 11, 1654–1664.
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[http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=4735565 A Resonant Global Clock Distribution for the Cell Broadband Engine Processor]
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[http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=962285 Rotary traveling-wave oscillator arrays: A new clock technology]
  
 
[http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=4751849 Custom Rotary Clock Router]
 
[http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=4751849 Custom Rotary Clock Router]
  
TASKIN, B., DEMAIO, J., FARELL, O., HAZELTINE, M., AND KETNER, R. 2009. [http://dl.acm.org/citation.cfm?id=1529266 Custom topology rotary clock router with tree subnetworks]. Transactions on Design Automation of Electronic Systems (TODAES) 14, 3.
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[http://dl.acm.org/citation.cfm?id=1529266 Custom topology rotary clock router with tree subnetworks]
  
  
 
These two would go together:
 
These two would go together:
GUTHAUS, M. R. 2011. [http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=05937788 Distributed LC resonant clock tree synthesis]. In International Symposium on Circuits
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[http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=05937788 Distributed LC resonant clock tree synthesis]  
and Systems (ISCAS). 1215–1218. && CONDLEY, W., HU, X., AND GUTHAUS, M. 2011. [http://dl.acm.org/citation.cfm?id=2355803 A methodology for local resonant clock synthesis using lc-assisted local clock buffers]. In International Conference on Computer-Aided Design (ICCAD). 503–506.
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[http://dl.acm.org/citation.cfm?id=2355803 A methodology for local resonant clock synthesis using lc-assisted local clock buffers]
 
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HU, X. AND GUTHAUS, M. 2012. [http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=06178290 Distributed LC resonant clock grid synthesis]. IEEE Transactions on Circuits and Systems I (TCAS-I).
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HU, X., CONDLEY, W., AND GUTHAUS, M. 2012. [http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=06241503 Library-aware resonant clock synthesis]. In Design Automa-
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[http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=06178290 Distributed LC resonant clock grid synthesis]
tion Conference (DAC).
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ROSENFELD, J. AND FRIEDMAN, E. 2006. [http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=01693024 Design methodology for global resonant h-tree clock distribution networks]. International Symposium on Circuits and Systems (ISCAS). **there is a journal version of this too**
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[http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=06241503 Library-aware resonant clock synthesis]
  
CHAN, S., RESTLE, P., SHEPARD, K., JAMES, N., AND FRANCH, R. 2004. [http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=1332734 A 4.6GHz resonant global clock distribution network]. International Solid-State Circuits Conference (ISSCC), 342 – 343.
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These two are related:
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[http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=01693024 Design methodology for global resonant h-tree clock distribution networks]
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[http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=4142782 Design Methodology for Global Resonant H-Tree Clock Distribution Networks] (Journal)
  
CHAN, S. C., SHEPARD, K. L., AND RESTLE, P. J. 2003. [http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=1240902 Design of resonant global clock distributions]. International Conference on Computer Design (ICCD).
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[http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=1332734 A 4.6GHz resonant global clock distribution network]
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[http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=1240902 Design of resonant global clock distributions]
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[http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=4735565 A Resonant Global Clock Distribution for the Cell Broadband Engine Processor]
  
YU, Z. AND LIU, X. 2009. [http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=04895681 Implementing multiphase resonant clocking on a finite-impulse response filter]. IEEE
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[http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=04895681 Implementing multiphase resonant clocking on a finite-impulse response filter]
Transactions on Very Large Scale Integration (VLSI) Systems 17, 11, 1593 – 1601.
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Revision as of 16:51, 1 November 2012

This quarter, we will put a focus on resonant and non-traditional clocking. We will have two presenters each day -- about 30-40 min each. Please select papers on either distributed/monolithic LC, rotary clocking, or standing wave clocking or similar non-traditional clocking papers.


Date Presenter Topic/Paper
10/03/12 Raj,Blake,Seokjoong VLSI-SOC Dry Run ** Will need to start at 10:30am sharp
10/10/12 NONE (VLSI-SoC)
10/17/12 NONE (Matt at NSF)
10/24/12 Matt How to review papers, Read the clock survey I wrote
10/31/12 Raj Standing Wave Clocking

http://ieeexplore.ieee.org/xpl/articleDetails.jsp?tp=&arnumber=280806&contentType=Journals+%26+Magazines&searchField%3DSearch_All%26queryText%3Dsalphasic+clock

http://ieeexplore.ieee.org/xpl/articleDetails.jsp?tp=&arnumber=1219105&contentType=Conference+Publications&searchField%3DSearch_All%26queryText%3D10ghz+global+clock

11/07/12 NONE (Matt at ICCAD)
11/14/12 Riadul
11/21/12 Ben
11/28/12 Bin
12/05/12 Hany


Date Presenter Topic/Paper
/13 Rafael
/13 Elnaz
/13 Jeff
/13 Nihan
/13
/13


Resonant Papers:

Uniform-phase uniform-amplitude resonant-load global clock distributions

Resonant clocking using distributed parasitic capacitance,

Jitter Characteristic in Charge Recovery Resonant Clock Distribution,

Design of resonant global clock distributions

Resonant-Clock Latch-Based Design

Resonant Clock Design for a Power-Efficient High-Volume x86-64 Microprocessor

A Resonant Clock 200MHz ARM926EJ-STM Microcontroller

A Resonant Global Clock Distribution for the Cell Broadband Engine Processor

Rotary traveling-wave oscillator arrays: A new clock technology

Custom Rotary Clock Router

Custom topology rotary clock router with tree subnetworks


These two would go together: Distributed LC resonant clock tree synthesis A methodology for local resonant clock synthesis using lc-assisted local clock buffers

Distributed LC resonant clock grid synthesis

Library-aware resonant clock synthesis

These two are related: Design methodology for global resonant h-tree clock distribution networks Design Methodology for Global Resonant H-Tree Clock Distribution Networks (Journal)

A 4.6GHz resonant global clock distribution network Design of resonant global clock distributions A Resonant Global Clock Distribution for the Cell Broadband Engine Processor

Implementing multiphase resonant clocking on a finite-impulse response filter