Difference between revisions of "280G F12"
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[http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=4476508 Resonant-Clock Latch-Based Design] | [http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=4476508 Resonant-Clock Latch-Based Design] | ||
| − | [http:// | + | [http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=6332544 Resonant Clock Design for a Power-Efficient High-Volume x86-64 Microprocessor] |
[http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=5325961 A Resonant Clock 200MHz ARM926EJ-STM Microcontroller] | [http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=5325961 A Resonant Clock 200MHz ARM926EJ-STM Microcontroller] | ||
Revision as of 16:53, 1 November 2012
This quarter, we will put a focus on resonant and non-traditional clocking. We will have two presenters each day -- about 30-40 min each. Please select papers on either distributed/monolithic LC, rotary clocking, or standing wave clocking or similar non-traditional clocking papers.
| Date | Presenter | Topic/Paper |
|---|---|---|
| 10/03/12 | Raj,Blake,Seokjoong | VLSI-SOC Dry Run ** Will need to start at 10:30am sharp |
| 10/10/12 | NONE (VLSI-SoC) | |
| 10/17/12 | NONE (Matt at NSF) | |
| 10/24/12 | Matt | How to review papers, Read the clock survey I wrote |
| 10/31/12 | Raj | Standing Wave Clocking |
| 11/07/12 | NONE (Matt at ICCAD) | |
| 11/14/12 | Riadul | |
| 11/21/12 | Ben | |
| 11/28/12 | Bin | |
| 12/05/12 | Hany |
| Date | Presenter | Topic/Paper |
|---|---|---|
| /13 | Rafael | |
| /13 | Elnaz | |
| /13 | Jeff | |
| /13 | Nihan | |
| /13 | ||
| /13 |
Resonant Papers:
Resonant clocking using distributed parasitic capacitance,
Jitter Characteristic in Charge Recovery Resonant Clock Distribution,
Design of resonant global clock distributions
Resonant-Clock Latch-Based Design
Resonant Clock Design for a Power-Efficient High-Volume x86-64 Microprocessor
A Resonant Clock 200MHz ARM926EJ-STM Microcontroller
A Resonant Global Clock Distribution for the Cell Broadband Engine Processor
Rotary traveling-wave oscillator arrays: A new clock technology
Custom topology rotary clock router with tree subnetworks
These two would go together:
Distributed LC resonant clock tree synthesis
A methodology for local resonant clock synthesis using lc-assisted local clock buffers
Distributed LC resonant clock grid synthesis
Library-aware resonant clock synthesis
These two are related: Design methodology for global resonant h-tree clock distribution networks
Design Methodology for Global Resonant H-Tree Clock Distribution Networks (Journal)
A 4.6GHz resonant global clock distribution network
Design of resonant global clock distributions
A Resonant Global Clock Distribution for the Cell Broadband Engine Processor
Uniform-phase uniform-amplitude resonant-load global clock distributions
Implementing multiphase resonant clocking on a finite-impulse response filter
