Difference between revisions of "ESESC Power"

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|}
 
|}
  
−
3. i-TLB
+
 
−
1. total_hits
+
{| class="wikitable" style="border:0;  width:600pt; height:2pt"
−
2. total_accesses
+
|- style="background:lightgray; text-align:left;"
−
3. total_misses
+
!  i-TLB
−
+
|}
−
4. Data TLB
+
 
−
1. total_accesses
+
{| class="wikitable" style="text-align:left; border:1px color:lightblue; cellpadding:4 "
−
2. read_accesses
+
|- style="background:lightblue; color:black"
−
3. write_accesses
+
!  #  || Counter Name
−
4. write_hits
+
|- style="background:aliceblue; color:black"
−
5. read_hits
+
!  1
−
6. read_misses
+
| total_hits
−
7. write_misses
+
|- style="background:aliceblue; color:black"
−
8. total_hits
+
!  2
−
9. total_misses
+
| total_accesses
 +
|- style="background:aliceblue; color:black"
 +
!  3
 +
| total_misses
 +
|}
 +
 
 +
 
 +
{| class="wikitable" style="border:0;  width:600pt; height:2pt"
 +
|- style="background:lightgray; text-align:left;"
 +
!  Branch Predictor Counter
 +
|}
 +
 
 +
{| class="wikitable" style="text-align:left; border:1px color:lightblue; cellpadding:4 "
 +
|- style="background:lightblue; color:black"
 +
!  #  || Counter Name
 +
|- style="background:aliceblue; color:black"
 +
!  1 
 +
| total_accesses
 +
|- style="background:aliceblue; color:black"
 +
!  2 
 +
| read_accesses
 +
|- style="background:aliceblue; color:black"
 +
!  3 
 +
| write_accesses
 +
|- style="background:aliceblue; color:black"
 +
!  4 
 +
| write_hits
 +
|- style="background:aliceblue; color:black"
 +
!  5 
 +
| read_hits
 +
|- style="background:aliceblue; color:black"
 +
!  6 
 +
| total_hits
 +
|- style="background:aliceblue; color:black"
 +
!  7 
 +
| read_misses
 +
|- style="background:aliceblue; color:black"
 +
!  8 
 +
| write_misses
 +
|- style="background:aliceblue; color:black"
 +
!  9 
 +
| total_misses
 +
|}
 +
 
 +
{| class="wikitable" style="border:0;  width:600pt; height:2pt"
 +
|- style="background:lightgray; text-align:left;"
 +
!  Data TLB
 +
|}
 +
 
 +
{| class="wikitable" style="text-align:left; border:1px color:lightblue; cellpadding:4 "
 +
|- style="background:lightblue; color:black"
 +
!  #  || Counter Name
 +
|- style="background:aliceblue; color:black"
 +
!  1
 +
| total_accesses
 +
|- style="background:aliceblue; color:black"
 +
!  2
 +
| read_accesses
 +
|- style="background:aliceblue; color:black"
 +
!  3
 +
| write_accesses
 +
|- style="background:aliceblue; color:black"
 +
!  4
 +
| write_hits
 +
|- style="background:aliceblue; color:black"
 +
!  5
 +
| read_hits
 +
|- style="background:aliceblue; color:black"
 +
!  6
 +
| total_hits
 +
|- style="background:aliceblue; color:black"
 +
!  7
 +
| read_misses
 +
|- style="background:aliceblue; color:black"
 +
!  8
 +
| write_misses
 +
|- style="background:aliceblue; color:black"
 +
!  9
 +
| total_misses
 +
|}
 
 
 +
{| class="wikitable" style="border:0;  width:600pt; height:2pt"
 +
|- style="background:lightgray; text-align:left;"
 +
!  Data Cache
 +
|}
 
5. Data Cache
 
5. Data Cache
 
1. total_accesses
 
1. total_accesses
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18. wbb_writes
 
18. wbb_writes
 
19. wbb_reads
 
19. wbb_reads
−
+
 
 +
{| class="wikitable" style="border:0;  width:600pt; height:2pt"
 +
|- style="background:lightgray; text-align:left;"
 +
!  Branch Predictor Counter
 +
|}
 
6. BTB
 
6. BTB
 
1. total_accesses
 
1. total_accesses
Line 113: Line 200:
 
9. write_misses  
 
9. write_misses  
 
10. replacement
 
10. replacement
−
+
 
 +
{| class="wikitable" style="border:0;  width:600pt; height:2pt"
 +
|- style="background:lightgray; text-align:left;"
 +
!  Branch Predictor Counter
 +
|}
 
7. Core
 
7. Core
 
1. instruction_buffer_reads  *
 
1. instruction_buffer_reads  *
Line 147: Line 238:
 
28. main_memory_access  
 
28. main_memory_access  
 
29. main_memory_write
 
29. main_memory_write
−
+
 
 +
{| class="wikitable" style="border:0;  width:600pt; height:2pt"
 +
|- style="background:lightgray; text-align:left;"
 +
!  Branch Predictor Counter
 +
|}
 
8. L2 Directory
 
8. L2 Directory
 
1. total_accesses
 
1. total_accesses
 
2. read_accesses
 
2. read_accesses
 
3. write_accesses
 
3. write_accesses
−
+
 
 +
{| class="wikitable" style="border:0;  width:600pt; height:2pt"
 +
|- style="background:lightgray; text-align:left;"
 +
!  Branch Predictor Counter
 +
|}
 
9. L2
 
9. L2
 
1. total_accesses
 
1. total_accesses
 
2. read_accesses
 
2. read_accesses
 
3. write_accesses
 
3. write_accesses
−
4. total_hits
+
4. total_hits{| class="wikitable" style="border:0;  width:600pt; height:2pt"
 +
|- style="background:lightgray; text-align:left;"
 +
!  Branch Predictor Counter
 +
|}
 
5. total_misses
 
5. total_misses
 
6. read_hits
 
6. read_hits
Line 164: Line 266:
 
9. write_misses
 
9. write_misses
 
10. repalcement
 
10. repalcement
−
11. write_backs
+
11. write_backs{| class="wikitable" style="border:0;  width:600pt; height:2pt"
 +
|- style="background:lightgray; text-align:left;"
 +
!  Branch Predictor Counter
 +
|}
 
12. miss_buffer_accesses
 
12. miss_buffer_accesses
 
13. fill_buffer_accesses
 
13. fill_buffer_accesses
Line 173: Line 278:
 
18. wbb_writes
 
18. wbb_writes
 
19. wbb_reads
 
19. wbb_reads
 +
 +
 +
{| class="wikitable" style="border:0;  width:600pt; height:2pt"
 +
|- style="background:lightgray; text-align:left;"
 +
!  Branch Predictor Counter
 +
|}
 
10. L3
 
10. L3
 
1. total_accesses
 
1. total_accesses
Line 194: Line 305:
 
19. wbb_reads
 
19. wbb_reads
  
 +
{| class="wikitable" style="border:0;  width:600pt; height:2pt"
 +
|- style="background:lightgray; text-align:left;"
 +
!  Branch Predictor Counter
 +
|}
 
12. memory
 
12. memory
 
1. memory_accesses
 
1. memory_accesses
 
2. memory_reads
 
2. memory_reads
 
3. memory_writes
 
3. memory_writes

Revision as of 23:47, 4 February 2010

McPAT performance Counters

ICache Counters
# Counter Name
1 total_accesses
2 read_accesses
3 read_misses
4 replacements (find an equivalent in the WB from esesc)
5 read_hits
6 total_hits
7 total_misses
8 miss_buffer_accesses
9 fill_buffer_accesses
10 prefetch_buffer_accesses
12 prefetch_buffer_hits
13 prefetch_buffer_writes
14 prefetch_buffer_reads


Branch Predictor Counter
# Counter Name
1 predictor_accesses


i-TLB
# Counter Name
1 total_hits
2 total_accesses
3 total_misses


Branch Predictor Counter
# Counter Name
1 total_accesses
2 read_accesses
3 write_accesses
4 write_hits
5 read_hits
6 total_hits
7 read_misses
8 write_misses
9 total_misses
Data TLB
# Counter Name
1 total_accesses
2 read_accesses
3 write_accesses
4 write_hits
5 read_hits
6 total_hits
7 read_misses
8 write_misses
9 total_misses
Data Cache

5. Data Cache 1. total_accesses 2. read_accesses 3. write_accesses 4. total_hits 5. total_misses 6. read_hits 7. write_hits 8. read_misses 9. write_misses 10. replacements 11. write_backs 12. miss_buffer_accesses 13. fill_buffer_accesses 14. prefetch_buffer_accesses 15. prefetch_buffer_hits 16. prefetch_buffer_writes 17. prefetch_buffer_rea 18. wbb_writes 19. wbb_reads

Branch Predictor Counter

6. BTB 1. total_accesses 2. read_accesses 3. write_accesses 4. total_hits 5. total_misses 6. read_hits 7. write_hits 8. read_misses 9. write_misses 10. replacement

Branch Predictor Counter

7. Core 1. instruction_buffer_reads * 2. instruction_buffer_writes * 3. ROB_reads * 4. ROB_writes * 5. rename_accesses * 6. inst_window_reads * 7. inst_window_writes * 8. inst_window_wakeup_access * 9. inst_window_selections *

//floating point arch/phys is missing in esesc 10. archi_int_regfile_reads 11. archi_int_regfile_reads 12. phy_int_regfile_reads 13. phy_float_regfile_reads * 14. phy_int_regfile_writes 15. phy_float_regfile_writes * 16. archi_int_regfile_writes 17. archi_float_regfile_writes *

18. windowed_reg_accesses * 19. windowed_reg_transports * 20. ialu_access * 21. fpu_access * 22. bypassbus_access =? writeFwdBus 23. load_buffer_reads * 24. load_buffer_writes * 25. store_buffer_reads * 26. store_buffer_writes * 27. store_buffer_forwards * 28. main_memory_access 29. main_memory_write

Branch Predictor Counter

8. L2 Directory 1. total_accesses 2. read_accesses 3. write_accesses

Branch Predictor Counter

9. L2 1. total_accesses 2. read_accesses 3. write_accesses 4. total_hits{| class="wikitable" style="border:0; width:600pt; height:2pt" |- style="background:lightgray; text-align:left;" ! Branch Predictor Counter |} 5. total_misses 6. read_hits 7. write_hits 8. read_misses 9. write_misses 10. repalcement 11. write_backs{| class="wikitable" style="border:0; width:600pt; height:2pt" |- style="background:lightgray; text-align:left;" ! Branch Predictor Counter |} 12. miss_buffer_accesses 13. fill_buffer_accesses 14. prefetch_buffer_accesses 15. prefetch_buffer_writes 16. prefetch_buffer_reads 17. prefetch_buffer_hits 18. wbb_writes 19. wbb_reads


Branch Predictor Counter

10. L3 1. total_accesses 2. read_accesses 3. write_accesses 4. total_hits 5. total_misses 6. read_hits 7. write_hits 8. read_misses 9. write_misses 10. repalcement 11. write_backs 12. miss_buffer_accesses 13. fill_buffer_accesses 14. prefetch_buffer_accesses 15. prefetch_buffer_writes 16. prefetch_buffer_reads 17. prefetch_buffer_hits 18. wbb_writes 19. wbb_reads

Branch Predictor Counter

12. memory 1. memory_accesses 2. memory_reads 3. memory_writes

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