280G F12

This quarter, we will put a focus on resonant and non-traditional clocking. We will have two presenters each day -- about 30-40 min each. Please select papers on either distributed/monolithic LC, rotary clocking, or standing wave clocking or similar non-traditional clocking papers.

Date	Presenter	Topic/Paper
10/03/12	Raj,Blake,Seokjoong	VLSI-SOC Dry Run ** Will need to start at 10:30am sharp
10/10/12	NONE (VLSI-SoC)
10/17/12	NONE (Matt at NSF)
10/24/12	Matt	How to review papers, Read the clock survey I wrote
10/31/12	Raj, Jeff
11/07/12	NONE (Matt at ICCAD)
11/14/12	Ben, Riadul
11/21/12	Bin, Nihan
11/28/12	Hany, Rafael
12/05/12	Elnaz, Nihan

Papers:

Uniform-phase uniform-amplitude resonant-load global clock distributions

Resonant clocking using distributed parasitic capacitance,

Jitter Characteristic in Charge Recovery Resonant Clock Distribution,

Design of resonant global clock distributions

Resonant-Clock Latch-Based Design

Variability:

The physical and electrical effects of metal-fill patterning practices for oxide chemical-mechanical polishing processes

Efficient coupled noise estimation for on-chip interconnects

Practical clock tree robustness signoff metrics

Process variation aware clock tree routing

A quadratic programming approach to clock skew scheduling for reduced sensitivity to process parameter variations

SSTA:

Statistical timing analysis considering spatial correlations using a single PERT-like traversal

Statistical timing analysis using bounds and selective enumeration

First-order incremental block-based statistical timing analysis

Statistical timing analysis: From basic principles to state of the art

Statistical static timing analysis: A survey

Statistical clock skew analysis considering intra-die process variations

Statistical analysis of clock skew variation in H-tree structure

Implementation:

The clock distribution of the POWER4 microprocessor

A 5GHz duty-cycle correcting clock distribution network for the POWER6 microprocessor

Multi-GHz clocking scheme for Intel Pentium 4 microprocessor

Myth busters: Microprocessor clocking is from mars, asic’s clocking is from venus?

Clocking design and analysis for a 600-MHz Alpha microprocessor

A 300-MHz 64-b quad-issue CMOS RISC microprocessor

A 200-MHz 64-b dual-issue CMOS microprocessor

The design and analysis of the clock distribution network for a 1.2GHz alpha microprocessor