Running LVS

To run LVS, you must have a schematic and a DRC clean layout.

NOTE: As of 09/28/07 there is a bug in the installation. In order to perform LVS correctly, you must modify the setup.sh to include these lines:

##########################
# NCSU CDK
export CDK_DIR=/mada/software/techfiles/NCSU_CDK_1.5.1
export SYSTEM_CDS_LIB_DIR=$CDK_DIR/cdssetup
export cds_root=/mada/software/cadence
export platform_dir=ICOA5251/tools.lnx86
export CDSHOME=$cds_root/$platform_dir
export CDS_SITE=$CDK_DIR
export USE_NCSU_CDK
export CDS_Netlisting_Mode=Analog
export OA_MODE=opt
export OA_BIT=32

These will be copied over by Monday 10/01/07 and I will remove this comment.

Extract a schematic

In your layout, first perform extraction by selecting Verify->Extract. Select "Join nets with same name." This command will analyze all the electrical connectivity of the different layers and create an "extracted" schematic view. This is what is compared to your schematic.

Running LVS

To open the LVS window, select Verify->LVS... In this window, you will need to select both your schematic and the recently generated extracted schematic. You can do this by browsing and selecting the appropriate cell views.

Debugging errors

There is a separate wiki page, Debugging LVS, on suggestions for debugging errors. This is a very difficult problem sometimes, but it is usually a simple swap of nets or pins.