Running LVS

To run LVS, you must have a schematic and a DRC clean layout.

LVS Options

To run LVS, first select Calibre->Setup->Layout Export. In the new window add the path to the layer map file:

/mada/software/techfiles/FreePDK45/ncsu_basekit/techfile/calibre/layer.inc

Then press OK and select Calibre->Run LVS. Like the DRC setup, select the LVS rules file:

/mada/software/techfiles/FreePDK45/ncsu_basekit/techfiles/calibre/calibreLVS.rul

In the Input section, make sure you are comparing layout and netlist. It should be hierarchical. Under the "Layout" tab, make sure the correct layout is selected and "Export from layout viewer" is selected. Under the "Netlist" tab make sure the correct top cell is selected and select "Export from schematic viewer".

If things go well, you should match!

Extract a schematic

In your layout, first perform extraction by selecting Verify->Extract. Select "Join nets with same name." This command will analyze all the electrical connectivity of the different layers and create an "extracted" schematic view. This is what is compared to your schematic.

Running LVS

To open the LVS window, select Verify->LVS... In this window, you will need to select both your schematic and the recently generated extracted schematic. You can do this by browsing and selecting the appropriate cell views as shown here:

After you run it, Virtuoso will return with a message that it has "successfully completed." This does not mean it passed, it means that it RAN! If it also displays "The net-lists match." like this:

If it doesn't, you must check the log by clicking the "Output" button.

Debugging errors

There is a separate wiki page, Debugging LVS, on suggestions for debugging errors. This is a very difficult problem sometimes, but it is usually a simple swap of nets or pins.