L0I
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Revision as of 20:09, 30 May 2009 by Ehsan K.Ardestani (Talk | contribs) (New page: Level 0 Instruction Cache is accessed from the processor with only reads. It is a blocking cache. A miss blocks all the newer requests. While there is a miss, incoming requests are buffere...)
Level 0 Instruction Cache is accessed from the processor with only reads. It is a blocking cache. A miss blocks all the newer requests. While there is a miss, incoming requests are buffered and replayed later by the cache.
