280G F12

From Vlsiwiki
Revision as of 22:53, 4 October 2012 by Jbutera (Talk | contribs)

Jump to: navigation, search

This quarter, we will put a focus on resonant and non-traditional clocking. We will have two presenters each day -- about 30-40 min each. Please select papers on either distributed/monolithic LC, rotary clocking, or standing wave clocking or similar non-traditional clocking papers.


Date Presenter Topic/Paper
10/03/12 Raj,Blake,Seokjoong VLSI-SOC Dry Run ** Will need to start at 10:30am sharp
10/10/12 NONE (VLSI-SoC)
10/17/12 NONE (Matt at NSF)
10/24/12 Matt How to review papers, Read the clock survey I wrote
10/31/12 Raj, Jeff
11/07/12 NONE (Matt at ICCAD)
11/14/12 Ben, Riadul
11/21/12 Bin, Nihan
11/28/12 Riadul, Rafael
12/05/12 Elnaz, Nihan


Papers:

Uniform-phase uniform-amplitude resonant-load global clock distributions

Resonant clocking using distributed parasitic capacitance,

Jitter Characteristic in Charge Recovery Resonant Clock Distribution,

Design of resonant global clock distributions