Verilog-A

Sample Cadence Verilog-A Library

Add the following to your libraries to gain access to the Cadence sample library

/mada/software/cadence/ICOA5251/tools.lnx86/dfII/samples/artist/ahdlLib

Spectre Netlist

Add the following command to allow spectre or ultrasim to compile Verilog-A files.

ahdl_include "<filename>"

Simulating Verilog-A in Ultrasim

For analog circuits described in Verilog - A

include the following command into the file that runs Ultrasim:

ahdl_include "<file>"

The verilog-a module can be instantiated in the netlist using the name of the module.

<Instance name> (port1, port2, port3) <module name>