Difference between revisions of "280G F12"

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[http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=1240902&url=http%3A%2F%2Fieeexplore.ieee.org%2Fxpls%2Fabs_all.jsp%3Farnumber%3D1240902 Design of resonant global clock distributions]
 
[http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=1240902&url=http%3A%2F%2Fieeexplore.ieee.org%2Fxpls%2Fabs_all.jsp%3Farnumber%3D1240902 Design of resonant global clock distributions]
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[http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=4476508 Resonant-Clock Latch-Based Design]

Revision as of 22:06, 5 October 2012

This quarter, we will put a focus on resonant and non-traditional clocking. We will have two presenters each day -- about 30-40 min each. Please select papers on either distributed/monolithic LC, rotary clocking, or standing wave clocking or similar non-traditional clocking papers.


Date Presenter Topic/Paper
10/03/12 Raj,Blake,Seokjoong VLSI-SOC Dry Run ** Will need to start at 10:30am sharp
10/10/12 NONE (VLSI-SoC)
10/17/12 NONE (Matt at NSF)
10/24/12 Matt How to review papers, Read the clock survey I wrote
10/31/12 Raj, Jeff
11/07/12 NONE (Matt at ICCAD)
11/14/12 Ben, Riadul
11/21/12 Bin, Nihan
11/28/12 Hany, Rafael
12/05/12 Elnaz, Nihan


Papers:

Uniform-phase uniform-amplitude resonant-load global clock distributions

Resonant clocking using distributed parasitic capacitance,

Jitter Characteristic in Charge Recovery Resonant Clock Distribution,

Design of resonant global clock distributions

Resonant-Clock Latch-Based Design