L0I
From Vlsiwiki
Revision as of 20:13, 30 May 2009 by Ehsan K.Ardestani (Talk | contribs)
Functionality Description
Level 0 Instruction Cache is accessed from the processor with only reads. It is a blocking cache. A miss blocks all the newer requests. While there is a miss, incoming requests are buffered and replayed later by the cache.
