Difference between revisions of "VLSI Reading Group"

From Vlsiwiki
Jump to: navigation, search
 
(29 intermediate revisions by 4 users not shown)
Line 1: Line 1:
 
__NOTOC__  
 
__NOTOC__  
 
==Overview==
 
==Overview==
The reading group will meet in E2-209 on Tuesdays 2-3pm. Students will be selected to present an informal discussion of a chosen paper. Credit (pass/fail only) for the seminar is given based on your participation.
+
The reading group will weekly. Students will be selected to present an informal discussion of a chosen paper. Credit (pass/fail only) for the seminar is given based on your participation.
  
==Participants==
+
==Current Schedule==
* [http://www.soe.ucsc.edu/~mrg Matthew Guthaus]
+
* [http://www.soe.ucsc.edu/~slogan Sheldon Logan]
+
* Jeren Semendari
+
* [http://www.soe.ucsc.edu/~kwoo Keven Woo]
+
* Derek C
+
* [http://www.soe.ucsc.edu/~seokjkim Seokjoong Kim]
+
* [http://www.soe.ucsc.edu/~xhu Xuchu Hu]
+
  
==Schedules==
+
* [[280G W15]]
  
[[280G W09]]
+
==Past Schedules==
[[280G F08]]
+
* [[280G F14]]
[[280G S08]]
+
* [[280G W13]]
[[280G W08]]
+
* [[280G F12]]
 
+
* [[280G S12]]
==Winter 2009==
+
* [[280G F11]]
{| border="1"
+
* [[280G S11]]
|-
+
* [[280G W11]]
! Date
+
* [[280G F10]]
! Presenter
+
* [[280G S10]]
! Paper
+
* [[280G W10]]
|-
+
* [[280G F09]]
| 1/9/09
+
* [[280G W09]]
| Meeting
+
* [[280G F08]]
|
+
* [[280G S08]]
|-
+
* [[280G W08]]
| 1/16/09
+
|Keven
+
|Yu Hu,Shih V,Majumdar R, Lei He (University of California Los Angeles), [http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=4555775&isnumber=4555759 FPGA area reduction by multi-output function based sequential resyntheis], DAC2008.
+
|
+
|-
+
| 1/16/09
+
|Seokjoong
+
|Li, F., Chen, D., He, L., and Cong (University of California Los Angeles), [http://portal.acm.org/citation.cfm?id=611844# Architecture evaluation for power-efficient FPGAs],FPGA '03
+
|
+
|-
+
| 1/23/09
+
|
+
|
+
|-
+
| 1/23/09
+
|
+
|
+
|-
+
| 1/30/09
+
|
+
|
+
|-
+
| 1/30/09
+
|
+
|
+
|-
+
| 2/6/09
+
|
+
|
+
|-
+
| 2/6/09
+
|
+
|
+
|-
+
| 2/13/09
+
|
+
|
+
|-
+
| 2/13/09
+
+
|
+
|-
+
| 2/20/09
+
|
+
|
+
|-
+
| 2/20/09
+
+
|
+
|-
+
| 2/27/09
+
|
+
|
+
|-
+
| 2/27/09
+
+
|
+
|-
+
| 3/6/09
+
|
+
|
+
|-
+
| 3/6/09
+
+
|
+
|-
+
| 3/13/09
+
|
+
|
+
|-
+
| 3/13/09
+
+
|
+
|-
+
|}
+
 
+
==Fall 2008==
+
{| border="1"
+
|-
+
! Date
+
! Presenter
+
! Paper
+
|-
+
| 9/30/08
+
| Jeff
+
| Jaydeep P. Kulkarni (Purdue Univ.), Keejong Kim (Broadcom Inc.), Sang Phill Prak (Purdue Univ.), Kaushik Roy (Purdue Univ.),  [http://bacon.cse.ucsc.edu/papers/DAC2008/data/papers/2008/07.6_Paper.pdf#page=1 Process Variation Tolerant SRAM Array for Ultra Low Voltage Applications], DAC2008.
+
|
+
|-
+
| 9/30/08
+
| Keven
+
| Jie Yang (University of Michigan), Luigi Capodieci (Advanced Micro Devices), Dennis Sylvester (University of Michigan), [http://portal.acm.org/ft_gateway.cfm?id=1065676&type=pdf&coll=ACM&dl=ACM&CFID=4011068&CFTOKEN=85144288 Advanced timing analysis based on post-OPC extraction of critical dimensions], DAC2005.
+
|-
+
| 10/7/08
+
| Seokjoong
+
| Seungwhun Paik, Youngsoo Shin (KAIST), [http://bacon.cse.ucsc.edu/papers/DAC2008/data/papers/2008/34.2_Paper.pdf#page=1 Multiobjective Optimization of Sleep Vector for Zigzag Power-Gated Circuits in Standard Cell Elements], DAC2008.
+
|-
+
| 10/7/08
+
| Everyone
+
| 5 Minute Update
+
|-
+
| 10/14/08
+
| Xuchu
+
| Minsik Cho, Suhail Ahmed, David Z.Pan, [http://www.cerc.utexas.edu/utda/publications/iccad05taco.pdf TACO: Temperature Aware Clock-tree Optimization] DAC2005
+
|-
+
| 10/14/08
+
| Derek
+
| Gupta, M, Oatley, J, Joseph, R, Gu-Yeon Wei, Brooks, D, [http://ieeexplore.ieee.org/search/srchabstract.jsp?arnumber=4211868&isnumber=4211749&punumber=4211748&k2dockey=4211868@ieeecnfs Understanding Voltage Variations in Chip Multiprocessors using a Distributed Power-Delivery Network] DATE2007
+
|-
+
| 10/21/08
+
|Sheldon
+
|Wei Huang, Micrea R. Stan, Karthik Sankaranarayanan, Robert J. Ribando,Kevin Skadron, [http://www.dac.com/45th/proceedings/papers/41_4.pdf Many-Core Design from a Thermal Perspective] DAC 2008
+
|-
+
| 10/21/08
+
| Everyone
+
| 5 Minute Update
+
|-
+
| 10/28/08
+
|
+
|No Class
+
|-
+
| 11/04/08
+
| Xuchu
+
|  A. Chakraborty,K. Duraisami,A. Sathanur,P. Sithambaram,L. Benini,A. Macii,E. Macii,M. Poncino , [http://portal.acm.org/citation.cfm?id=1165612 Dynamic thermal clock skew compensation using tunable delay buffers] ACM2006
+
|-
+
| 11/04/08
+
| Keven
+
| Tai-Chen Chen,Guang-Wan Liao,Yao-Wen Chang [http://portal.acm.org/citation.cfm?id=1391469.1391599 Predictive Formulae for OPC with Applications to Lithography-Friendly Routing ]
+
|-
+
| 11/11/08
+
|
+
| Veteran's Day (No Class)
+
|-
+
| 11/18/08
+
| Jeff
+
| 1Rajiv Joshi, 2Rouwaida Kanj, 1Keunwoo Kim, 3Richard Williams, and 1Ching-Te Chuang, 1IBM T. J. Watson Research Center, Yorktown Heights, NY 10598, 2IBM Austin Research Labs, Austin Tx 78758, 3IBM STG, Essex Junction, VT 05452, rvjoshi@us.ibm.com, [http://portal.acm.org/citation.cfm?id=1283784 A floating-body dynamic supply boosting technique for low-voltage sram in nanoscale PD/SOI CMOS technologies], DAC2006.
+
|-
+
| 11/18/08
+
| Everyone
+
| 5 Minute Update
+
|-
+
| 11/25/08
+
| Seokjoong
+
| Yu-Shiang Lin; Sylvester, D., [http://ieeexplore.ieee.org/search/wrapper.jsp?arnumber=4196108 Runtime leakage power estimation technique for combinational circuits], ASP-DAC 2007.
+
|
+
|-
+
| 11/25/08
+
| Derek
+
| Min Ni Seda Ogrenci Memik [http://bacon.cse.ucsc.edu/papers/DAC2008/data/papers/2008/34.4_Paper.pdf Leakage Power-Aware Clock Skew Scheduling: Converting Stolen Time into Leakage Power Reduction] DAC 2008
+
|-
+
| 12/02/08
+
| Sheldon
+
| Practice qualification talk.
+
|-
+
| 12/02/08
+
| Everyone
+
| 5 Minute Update
+
|}
+
 
+
== Potential Papers==
+
 
+
* Focus primarily on [http://bacon.cse.ucsc.edu/papers/DAC2008/start.htm DAC 2008]
+
 
+
== Old Schedules ==
+
===Spring 2008===
+
{| border="1"
+
|-
+
! Date
+
! Presenter
+
! Paper
+
|-
+
| 4/7/08
+
| Rigo
+
| S. N. Adya and I. L. Markov, "[http://vlsicad.eecs.umich.edu/BK/parquet/iccd_2001_floorplan.pdf Fixed-outline Floorplanning Through Better Local Search]"  Int'l Conf. On Computer Design (ICCD 2001), pp.328-333.
+
|-
+
| 4/7/08
+
| Sheldon
+
| Rao, R. M., Liu, F., Burns, J. L., and Brown, R. B. [http://ieeexplore.ieee.org/Xplore/login.jsp?url=/iel5/8895/28127/01257884.pdf?isnumber=28127&prod=CNF&arnumber=1257884&arSt=+689&ared=+692&arAuthor=Rao%2C+R.M.%3B+Liu%2C+F.%3B+Burns%2C+J.L.%3B+Brown%2C+R.B. A Heuristic to Determine Low Leakage Sleep State Vectors for CMOS Combinational Circuits]. ICCAD, 2003, pp 689-697
+
|-
+
| 4/14/08
+
|
+
| No class (@ ISPD)
+
|-
+
| 4/21/08
+
| Matt
+
| Satisfiability (No Paper)
+
|-
+
| 4/28/08
+
| Derek
+
| Verilog-A & Current Work
+
|-
+
| 5/5/08
+
| -
+
| Out of Town
+
|-
+
| 5/12/08
+
| Jeff
+
| B. Mohammad, M. Saint-Laurent, P. Bassett, and J. Abraham.  [http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=4479707 Cache Design for Low Power and High Yield]. ISQED, 2008, pp 103-107.
+
|-
+
| 5/19/08
+
| Keven
+
| J. Sheaeffer D. Luebke K. Skadron  [http://www.cs.virginia.edu/~skadron/Papers/sheaffer_gh2007.pdf A Hardware Redundancy and Recovery Mechanism for Reliable Scientific Computation on Graphics Processors]. ACM, 2007
+
|-
+
| 5/26/08
+
| Nobody
+
| No class (Memorial Day)
+
|-
+
| 6/2/08
+
| -
+
| No Class
+
|
+
|-
+
| 6/9/08
+
| -
+
| No Class (@ DAC)
+
|}
+
=== Winter 2008 ===
+
{| border="1"
+
|-
+
! Date
+
! Presenter
+
! Paper
+
|-
+
| 1/10/08
+
| -
+
| NOT MEETING
+
|-
+
| 1/17/08
+
| Matt
+
| M.R. Guthaus, D. Sylvester, R.B. Brown. [http://bacon.cse.ucsc.edu/papers/guthaus-aspdac08.pdf Clock Tree Synthesis with Data-path Sensitivity Matching], ASPDAC, Seoul, Korea, 2008, IN PRESS.
+
|-
+
| 1/24/08
+
| -
+
| NOT MEETING
+
|-
+
| 1/31/08
+
| Yaron
+
| Boyd, S. P. and Kim, S. J. [http://portal.acm.org/citation.cfm?id=1055148  Geometric programming for circuit optimization], In Proceedings of the 2005 international Symposium on Physical Design (San Francisco, California, USA, April 03 - 06, 2005). ISPD '05. ACM, New York, NY, 44-46.
+
 
+
|-
+
| 1/31/08
+
| Rigo
+
| F. Wang, X. Wu and Y. Xie, [http://bacon.cse.ucsc.edu/papers/aspdac_2008/p2_1A-1.pdf Variability-Driven Module Selection with Joint Design Time Optimization and Post-Silicon Tuning], ASPDAC 2008.
+
|-
+
| 2/07/08
+
| -
+
| NOT MEETING
+
|-
+
| 2/14/08
+
| Sheldon
+
| Ketan N. Patel, Igor L. Markov and John P. Hayes. [http://citeseer.ist.psu.edu/644440.html Evaluating Circuit Reliability Under Probabilistic Gate-Level Fault Models],  IWLS 2003.
+
|-
+
| 2/14/08
+
| Keven
+
| K.-C. Wu and D. Marculescu, [http://bacon.cse.ucsc.edu/papers/aspdac_2008/p559_7A-1.pdf Soft Error Rate Reduction Using Redundancy Addition and Removal ], ASPDAC 2008.
+
|-
+
| 2/21/08
+
| Jeff
+
| Liang, X., Turgay, K., and Brooks, D.  [http://portal.acm.org/citation.cfm?id=1326073.1326245&coll=&dl=GUIDE&type=series&idx=SERIES388&part=series&WantType=Proceedings&title=ICCAD# Architectural power models for SRAM and CAM structures based on hybrid analytical/empirical techniques]. ICCAD, 2007, pp 824-830. 
+
|-
+
| 2/21/08
+
| Jeff
+
| [http://www.ece.ubc.ca/~stevew/papers/html/jssc96/paper.html Cacti]
+
|-
+
| 2/28/08
+
| Mohammed
+
| Wei Huang; Ghosh, S.; Velusamy, S.; Sankaranarayanan, K.; Skadron, K.; Stan, M.R., "[http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=1650228 HotSpot: a compact thermal modeling methodology for early-stage VLSI design]," Very Large Scale Integration (VLSI) Systems, IEEE Transactions on , vol.14, no.5, pp. 501-513, May 2006.
+
|-
+
| 2/28/08
+
| Linh
+
|  Xin Li,    Taylor, Brian    YuTsun Chien,    Pileggi, Lawrence T. [http://www.ieeexplore.ieee.org/xpls/abs_all.jsp?isnumber=4397223&arnumber=4397306&count=153&index=82 Adaptive post-silicon tuning for analog circuits: concept, analysis and optimization.] ICCAD 2007, pp 450-457.
+
|-
+
| 3/6/08
+
|
+
| NO MEETING
+
|-
+
| 3/13/08
+
| Janak H. Patel (UIUC)
+
| CMOS Process Variations: A "Critical Operation Point" hypothesis 
+
|-
+
|}
+

Latest revision as of 16:45, 5 January 2015

Overview

The reading group will weekly. Students will be selected to present an informal discussion of a chosen paper. Credit (pass/fail only) for the seminar is given based on your participation.

Current Schedule

Past Schedules