RAKE

• Rake wiki
  

standard directory structure (ie scoore/fpu)
asic asic related
bist
docs all documentation
rtl all verilog code
scripts any special scripts
tests all testbench code
TODO future todo text file

run rake in 'main' directory
rake parses the .xml file which is named 'dir name'.xml

xml files contain 3 different target types
asic synplify
fpga synplify
testbenches VCS / Modelsim

running rake in a main directory with no parameters shows all possible targets.

Some important rake options
to view the commands rake invokes (Usefull for debugging), use v=1 rake option (requires a target ie. test:all)

For testbenching:
rake will invoke the vcs command, this compiles all RTL and C++ testbench files, to create a ./simv executable (which is the compiled tb)

To change simulators, we can tell rake to use Modelsim instead (VCS is the default)

       rake test:all suite=vsim

To launch the GUI, use the rake option gui=1

       rake test:all gui=1

DVE: VCS GUI tutorial (start from page 6) http://www-inst.eecs.berkeley.edu/~cs250/fa09/handouts/tut4-vcs.pdf

When passing parameters to your testbench:

       rake does not yet allow for parameters to be passed to the simulator.

       Work around:

               rake test:softfloat_tb v=1

               then copy and paste the vcs command

               run it

               

               This will compile the tb to make it fresh.

               Now the tb executable has been created (./simv or ./vsim)

               pass parameters to executable (ie ./simv +test=float64_add)

Look at the ATC wiki for cycle accurate testbench example https://vlsiwiki.soe.ucsc.edu/index.php/ATC

To interrupt a running simulation, press ctrl-C, this will dump you into the simulator console, type quit to exit