Difference between revisions of "Ce"
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| Line 15: | Line 15: | ||
|+ AUNIT Module | |+ AUNIT Module | ||
|- style="height:150px; vertical-align:top" | |- style="height:150px; vertical-align:top" | ||
| − | ! | + | !aunit_stage1 |
| − | ! | + | !aunit_stage2 |
| − | ! | + | !salu |
| − | ! | + | !write_back |
|} | |} | ||
| Line 24: | Line 24: | ||
|+ BUNIT Module | |+ BUNIT Module | ||
|- style="height:150px; vertical-align:top" | |- style="height:150px; vertical-align:top" | ||
| − | ! | + | !bunit_stage1 |
| − | ! | + | !bunit_stage2 |
| − | ! | + | !balu/salu |
| − | ! | + | !write_back |
|} | |} | ||
| Line 33: | Line 33: | ||
|+ CUNIT Module | |+ CUNIT Module | ||
|- style="height:150px; vertical-align:top" | |- style="height:150px; vertical-align:top" | ||
| − | ! | + | !cunit_stage1 |
| − | ! | + | !cunit_stage2 |
| − | ! | + | !FPU |
| − | ! | + | !write_back |
|} | |} | ||
| Line 42: | Line 42: | ||
|+ MUNIT Module | |+ MUNIT Module | ||
|- style="height:150px; vertical-align:top" | |- style="height:150px; vertical-align:top" | ||
| − | ! | + | !munit_stage1 |
| − | ! | + | !munit_stage2 |
| − | ! | + | !CACHE |
| − | ! | + | !write_back |
|} | |} | ||
--[[User:Rigo Dicochea|Rigo Dicochea]] 09:47, 30 March 2009 (PDT) | --[[User:Rigo Dicochea|Rigo Dicochea]] 09:47, 30 March 2009 (PDT) | ||
Revision as of 17:00, 30 March 2009
== Compute Engine Design Specifications ==
The COMPUTE ENGINE of SCOORE is responsible for all the calculations of the processor. SCOORE is a clustered architecture, we have FOUR main units which comprise the COMPUTE ENGINE.
- AUNIT is responsible for all the "simple arithmetic operations" of the CPU.(Single Port)\n
- BUNIT is responsible for branch operations. (Dual Port)\b
- CUNIT handles all floating point operations. (Single Port)\b
- MUNIT handles all Load and Store operations. (Dual Port)
A more detailed description of each individual block is given below.
| aunit_stage1 | aunit_stage2 | salu | write_back |
|---|
| bunit_stage1 | bunit_stage2 | balu/salu | write_back |
|---|
| cunit_stage1 | cunit_stage2 | FPU | write_back |
|---|
| munit_stage1 | munit_stage2 | CACHE | write_back |
|---|
--Rigo Dicochea 09:47, 30 March 2009 (PDT)
