Difference between revisions of "Ratrob"

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THIS PAGE IS UNDER CONSTUCTION
 
THIS PAGE IS UNDER CONSTUCTION
  
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==Fetch Engine → RobRat Interface==
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==Fetch Engine==
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===Branch Predictor Msg===
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===[[Branch Predictor I/F]]===
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* <b>[[BPredRecoveryType]]</b>
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*<b> BPredRecoveryType </b>   
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<span style="color:Blue"> <i> OUTPUT </i></span>
  
 
::{| height=”50”
 
::{| height=”50”
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|width=100pt | <span style="color:Crimson"> <b> state </b></span>
 
|width=100pt | <span style="color:Crimson"> <b> state </b></span>
 
|width=100pt | (9 bits)
 
|width=100pt | (9 bits)
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|}
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*<b> Status Flag </b>   
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<span style="color:Blue"> <i> OUTPUT </i></span>
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::{| height=”50”
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|width=150pt |<i> BoolType </i>
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|width=100pt | <span style="color:Crimson"> <b> rr_empty </b></span>
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|width=100pt | (1 bits)
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|}
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===[[Crack I/F]]===
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*<b> Constants </b>   
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::{| height=”50”
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|width=150pt |<i> const  ClusterIdType </i>
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|width=100pt | <span style="color:Crimson"> <b> CLUSTER_AUNIT </b></span>
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|width=100pt | 2'b00
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|-
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|width=150pt |<i> const ClusterIdType </i>
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|width=100pt | <span style="color:Crimson"> <b> CLUSTER_AUNIT </b></span>
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|width=100pt | 2'b01
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|-
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|width=150pt |<i> const ClusterIdType </i>
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|width=100pt | <span style="color:Crimson"> <b> CLUSTER_AUNIT </b></span>
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|width=100pt | 2'b10
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|-
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|width=150pt |<i> const ClusterIdType  </i>
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|width=100pt | <span style="color:Crimson"> <b> CLUSTER_AUNIT </b></span>
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|width=100pt | 2'b11
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|}
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*<b> LRegType </b>   
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::{| height=”50”
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! Range of Register
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|-
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|width=150pt |<i> 0..31 </i>
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|width=200pt | <span style="color:Crimson"> <b> integer logical register </b></span>
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|-
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|width=150pt |<i> 32..63  </i>
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|width=200pt | <span style="color:Crimson"> <b> FP logical register </b></span>
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|-
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|width=150pt |<i> 64..74</i>
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|width=200pt | <span style="color:Crimson"> <b> special use registers </b></span>
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|}
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::{| height=”50”
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!Special Use Registers Definitions
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|-
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|width=150pt |<i> const  LRegType </i>
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|width=100pt | <span style="color:Crimson"> <b> LOG_ZERO </b></span>
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|width=100pt | 7'b0000000;
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|-
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|width=150pt |<i> const  LRegType </i>
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|width=100pt | <span style="color:Crimson"> <b> LOG_CEXC </b></span>
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|width=100pt | 7'd64;
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|-
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|width=150pt |<i> const  LRegType </i>
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|width=100pt | <span style="color:Crimson"> <b> LOG_ PSR  </b></span>
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|width=100pt | 7'd65;
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|-
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|width=150pt |<i> const  LRegType </i>
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|width=100pt | <span style="color:Crimson"> <b> LOG_ WIM  </b></span>
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|width=100pt | 7'd66;
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|-
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|width=150pt |<i> const  LRegType </i>
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|width=100pt | <span style="color:Crimson"> <b> LOG_ CWP  </b></span>
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|width=100pt | 7'd67;
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|-
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|width=150pt |<i> const  LRegType </i>
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|width=100pt | <span style="color:Crimson"> <b> LOG_ TBR  </b></span>
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|width=100pt | 7'd68;
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|-
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|width=150pt |<i> const  LRegType </i>
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|width=100pt | <span style="color:Crimson"> <b> LOG_ Y  </b></span>
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|width=100pt | 7'd69;
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|-
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|width=150pt |<i> const  LRegType </i>
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|width=100pt | <span style="color:Crimson"> <b> LOG_ FSR  </b></span>
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|width=100pt | 7'd70;
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|-
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|width=150pt |<i> const  LRegType </i>
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|width=100pt | <span style="color:Crimson"> <b> LOG_ ICC  </b></span>
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|width=100pt | 7'd71;
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|-
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|width=150pt |<i> const  LRegType </i>
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|width=100pt | <span style="color:Crimson"> <b> LOG_ FCC  </b></span>
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|width=100pt | 7'd672;
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|-
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|width=150pt |<i> const  LRegType </i>
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|width=100pt | <span style="color:Crimson"> <b> LOG_ PC  </b></span>
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|width=100pt | 7'd73;
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|-
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|width=150pt |<i> const  LRegType </i>
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|width=100pt | <span style="color:Crimson"> <b> LOG_ TMP  </b></span>
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|width=100pt | 7'd74;
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|}
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*<b> DInst_CRType </b>   
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<span style="color:Blue"> <i> INPUT </i></span>
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::{| height=”50”
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|width=150pt |<i> '''BoolType''' </i>
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|width=100pt | <span style="color:Crimson"> <b> valid </b></span>
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|width=100pt | (1 bits)
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|-
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|width=150pt |<i> '''BoolType''' </i>
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|width=100pt | <span style="color:Crimson"> <b> slow </b></span>
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|width=100pt | (1 bits)
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|-
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|width=150pt |<i> ‘’’OPType ‘’’</i>
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|width=100pt | <span style="color:Crimson"> <b> op </b></span>
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|width=100pt | 10 bits)
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|-
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|width=150pt |<i> ‘’’IMMType ‘’’</i>
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|width=100pt | <span style="color:Crimson"> <b> imm </b></span>
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|width=100pt | (32 bits)
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|-
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|width=150pt |<i> '''BoolType''' </i>
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|width=100pt | <span style="color:Crimson"> <b> expop </b></span>
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|width=100pt | (1 bits)
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|-
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|width=150pt |<i> '''BoolType''' </i>
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|width=100pt | <span style="color:Crimson"> <b> cexc </b></span>
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|width=100pt | (1 bits)
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|-
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|width=150pt |<i> '''BoolType''' </i>
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|width=100pt | <span style="color:Crimson"> <b> aexc_clear </b></span>
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|width=100pt | (1 bits)
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|-
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|width=150pt |<i> '''BoolType''' </i>
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|width=100pt | <span style="color:Crimson"> <b> icc </b></span>
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|width=100pt | (1 bits)
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|-
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|width=150pt |<i> '''BoolType''' </i>
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|width=100pt | <span style="color:Crimson"> <b> useY </b></span>
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|width=100pt | (1 bits)
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|-
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|width=150pt |<i> '''BPredStateType </i>
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|width=100pt | <span style="color:Crimson"> <b> state </b></span>
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|width=100pt | (9 bits)
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|-
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|width=150pt |<i> ''' ClusterIdType ‘’’</i>
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|width=100pt | <span style="color:Crimson"> <b> id </b></span>
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|width=100pt | (3 bits)
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|-
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|width=150pt |<i> ''' LRegType ''' </i>
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|width=100pt | <span style="color:Crimson"> <b> ldest </b></span>
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|width=100pt | (7 bits)
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|-
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|width=150pt |<i> ''' LRegType ''' </i>
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|width=100pt | <span style="color:Crimson"> <b> lsrc1</b></span>
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|width=100pt | (7 bits)
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|-
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|width=150pt |<i> ''' LRegType ''' </i>
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|width=100pt | <span style="color:Crimson"> <b> lsrc2</b></span>
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|width=100pt | (7 bits)
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|}
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*<b> Status Flag </b>   
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<span style="color:Blue"> <i> INPUT </i></span>
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::{| height=”50”
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|width=150pt |<i> BoolType </i>
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|width=100pt | <span style="color:Crimson"> <b> sched_busy </b></span>
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|width=100pt | (1 bits)
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|}
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::{| height=”50”
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|width=150pt |<i> BoolType </i>
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|width=100pt | <span style="color:Crimson"> <b> rr_clear </b></span>
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|width=100pt | (1 bits)
 
|}
 
|}

Revision as of 23:37, 17 May 2009

THIS PAGE IS UNDER CONSTUCTION

Fetch Engine

Branch Predictor I/F

  • BPredRecoveryType

OUTPUT

BoolType miss (1 bits)
BoolType taken (1 bits)
AddrType target_PC (32 bits)
AddrType addrs (32 bits)
BPredStateType state (9 bits)
  • Status Flag

OUTPUT

BoolType rr_empty (1 bits)






Crack I/F

  • Constants
const ClusterIdType CLUSTER_AUNIT 2'b00
const ClusterIdType CLUSTER_AUNIT 2'b01
const ClusterIdType CLUSTER_AUNIT 2'b10
const ClusterIdType CLUSTER_AUNIT 2'b11
  • LRegType
Range of Register
0..31 integer logical register
32..63 FP logical register
64..74 special use registers






Special Use Registers Definitions
const LRegType LOG_ZERO 7'b0000000;
const LRegType LOG_CEXC 7'd64;
const LRegType LOG_ PSR 7'd65;
const LRegType LOG_ WIM 7'd66;
const LRegType LOG_ CWP 7'd67;
const LRegType LOG_ TBR 7'd68;
const LRegType LOG_ Y 7'd69;
const LRegType LOG_ FSR 7'd70;
const LRegType LOG_ ICC 7'd71;
const LRegType LOG_ FCC 7'd672;
const LRegType LOG_ PC 7'd73;
const LRegType LOG_ TMP 7'd74;
  • DInst_CRType

INPUT

BoolType valid (1 bits)
BoolType slow (1 bits)
‘’’OPType ‘’’ op 10 bits)
‘’’IMMType ‘’’ imm (32 bits)
BoolType expop (1 bits)
BoolType cexc (1 bits)
BoolType aexc_clear (1 bits)
BoolType icc (1 bits)
BoolType useY (1 bits)
BPredStateType state (9 bits)
ClusterIdType ‘’’ id (3 bits)
LRegType ldest (7 bits)
LRegType lsrc1 (7 bits)
LRegType lsrc2 (7 bits)
  • Status Flag

INPUT

BoolType sched_busy (1 bits)
BoolType rr_clear (1 bits)
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