Difference between revisions of "Ratrob"
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==Fetch Engine== | ==Fetch Engine== | ||
===[[Branch Predictor I/F]]=== | ===[[Branch Predictor I/F]]=== | ||
| − | *<b> BPredRecoveryType </b> | + | *<b> BPredRecoveryType </b> <span style="color:Blue"> <i> OUTPUT </i></span> |
| − | <span style="color:Blue"> <i> OUTPUT </i></span> | + | |
::{| height=”50” | ::{| height=”50” | ||
Revision as of 23:39, 17 May 2009
THIS PAGE IS UNDER CONSTUCTION
Fetch Engine
Branch Predictor I/F
- BPredRecoveryType OUTPUT
BoolType miss (1 bits) BoolType taken (1 bits) AddrType target_PC (32 bits) AddrType addrs (32 bits) BPredStateType state (9 bits)
- Status Flag
OUTPUT
BoolType rr_empty (1 bits)
Crack I/F
- Constants
const ClusterIdType CLUSTER_AUNIT 2'b00 const ClusterIdType CLUSTER_AUNIT 2'b01 const ClusterIdType CLUSTER_AUNIT 2'b10 const ClusterIdType CLUSTER_AUNIT 2'b11
- LRegType
Range of Register 0..31 integer logical register 32..63 FP logical register 64..74 special use registers
Special Use Registers Definitions const LRegType LOG_ZERO 7'b0000000; const LRegType LOG_CEXC 7'd64; const LRegType LOG_ PSR 7'd65; const LRegType LOG_ WIM 7'd66; const LRegType LOG_ CWP 7'd67; const LRegType LOG_ TBR 7'd68; const LRegType LOG_ Y 7'd69; const LRegType LOG_ FSR 7'd70; const LRegType LOG_ ICC 7'd71; const LRegType LOG_ FCC 7'd672; const LRegType LOG_ PC 7'd73; const LRegType LOG_ TMP 7'd74;
- DInst_CRType
INPUT
BoolType valid (1 bits) BoolType slow (1 bits) ‘’’OPType ‘’’ op 10 bits) ‘’’IMMType ‘’’ imm (32 bits) BoolType expop (1 bits) BoolType cexc (1 bits) BoolType aexc_clear (1 bits) BoolType icc (1 bits) BoolType useY (1 bits) BPredStateType state (9 bits) ClusterIdType ‘’’ id (3 bits) LRegType ldest (7 bits) LRegType lsrc1 (7 bits) LRegType lsrc2 (7 bits)
- Status Flag
INPUT
BoolType sched_busy (1 bits)
BoolType rr_clear (1 bits)
