Difference between revisions of "Ratrob"

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THIS PAGE IS UNDER CONSTUCTION
  
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                  THIS PAGE IS UNDER CONSTUCTION
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==Fetch Engine==
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===[[Branch Predictor I/F]]===
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*<b> <u>BPredRecoveryType </u></b>    <span style="color:Blue"> <i> OUTPUT </i></span>
  
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:{| height=”50”
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|width=150pt |<i> '''BoolType''' </i>
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|width=100pt | <span style="color:Crimson"> <b>miss </b></span>
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|width=100pt | (1 bits)
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|-
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|width=150pt |<i> '''BoolType''' </i>
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|width=100pt | <span style="color:Crimson"> <b> taken </b></span>
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|width=100pt | (1 bits)
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|-
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|width=150pt |<i> '''AddrType''' </i>
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|width=100pt | <span style="color:Crimson"> <b> target_PC </b></span>
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|width=100pt | (32 bits)
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|-
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|width=150pt |<i> '''AddrType''' </i>
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|width=100pt | <span style="color:Crimson"> <b> addrs </b></span>
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|width=100pt | (32 bits)
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|-
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|width=150pt |<i> '''BPredStateType </i>
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|width=100pt | <span style="color:Crimson"> <b> state </b></span>
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|width=100pt | (9 bits)
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|}
  
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'''BPredRecoveryType''' OUTPUT
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*<b> <u>Status Flag</u> </b>    <span style="color:Blue"> <i> OUTPUT </i></span>
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:{| height=”50”
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BoolType miss (1 bit)
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|width=150pt |<i> BoolType </i>
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The miss flag (indicates whether the prediction made by the Branch Predictor was incorrect (asserted). Assertion of this flag indicates that the prediction was incorrect. If unasserted, the values in this interface are undefined.
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|width=100pt | <span style="color:Crimson"> <b> rr_empty </b></span>
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The value is copied from the B_Unit (Bunit_Br_DoneType miss field).
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|width=100pt | (1 bits)
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BoolType taken (1 bit)
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|}
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The taken flag indicates, when the Branch instruction is actually executed, the result of the branch condition. If taken is asserted, the executed branch instruction indicated that the branch should have been taken; if unasserted, the branch should not have been taken. (e.g. Br Taken = 1; Br Not Taken = 0);
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The value is copied from the B_Unit (Bunit_Br_DoneType taken field).
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===[[Crack I/F]]===
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 AddrType target_PC (32 bits)
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The target_PC is the branch target address calculated by the FU when the branch instruction is executed.
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*<b> DInst_CRType </b>    <span style="color:Blue"> <i> INPUT </i></span>
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The value is copied from the B_Unit (Bunit_Br_DoneType target_PC field).
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:{| height=”50”
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 AddrType addrs (32 bits)
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|width=150pt |<i> '''BoolType''' </i>
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The addrs field is the PC address of the branch instruction associated with this transaction.
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|width=100pt | <span style="color:Crimson"> <b> valid </b></span>
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The value is exacted from the instruction’s ROB entry.
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|width=100pt | (1 bits)
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 BPredStateType stat
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|-
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|width=150pt |<i> '''BoolType''' </i>
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|width=100pt | <span style="color:Crimson"> <b> slow </b></span>
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|width=100pt | (1 bits)
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|-
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|width=150pt |<i> '''OPType'''</i>
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|width=100pt | <span style="color:Crimson"> <b> op </b></span>
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|width=100pt | 10 bits)
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|-
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|width=150pt |<i> '''IMMType'''</i>
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|width=100pt | <span style="color:Crimson"> <b> imm </b></span>
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|width=100pt | (32 bits)
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|-
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|width=150pt |<i> '''BoolType''' </i>
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|width=100pt | <span style="color:Crimson"> <b> expop </b></span>
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|width=100pt | (1 bits)
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|-
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|width=150pt |<i> '''BoolType''' </i>
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|width=100pt | <span style="color:Crimson"> <b> cexc </b></span>
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|width=100pt | (1 bits)
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|-
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|width=150pt |<i> '''BoolType''' </i>
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|width=100pt | <span style="color:Crimson"> <b> aexc_clear </b></span>
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|width=100pt | (1 bits)
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|-
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|width=150pt |<i> '''BoolType''' </i>
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|width=100pt | <span style="color:Crimson"> <b> icc </b></span>
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|width=100pt | (1 bits)
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|-
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|width=150pt |<i> '''BoolType''' </i>
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|width=100pt | <span style="color:Crimson"> <b> useY </b></span>
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|width=100pt | (1 bits)
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|-
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|width=150pt |<i> '''BPredStateType </i>
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|width=100pt | <span style="color:Crimson"> <b> state </b></span>
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|width=100pt | (9 bits)
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|-
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|width=150pt |<i> ''' ClusterIdType ''' </i>
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|width=100pt | <span style="color:Crimson"> <b> id </b></span>
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|width=100pt | (3 bits)
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|-
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|width=150pt |<i> ''' LRegType ''' </i>
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|width=100pt | <span style="color:Crimson"> <b> ldest </b></span>
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|width=100pt | (7 bits)
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|-
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|width=150pt |<i> ''' LRegType ''' </i>
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|width=100pt | <span style="color:Crimson"> <b> lsrc1</b></span>
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|width=100pt | (7 bits)
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|-
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|width=150pt |<i> ''' LRegType ''' </i>
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|width=100pt | <span style="color:Crimson"> <b> lsrc2</b></span>
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|width=100pt | (7 bits)
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|}
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*<b> Status Flag </b>    <span style="color:Blue"> <i> INPUT </i></span>
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:{| height=”50”
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|width=150pt |<i> BoolType </i>
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|width=100pt | <span style="color:Crimson"> <b> sched_busy </b></span>
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|width=100pt | (1 bits)
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|}
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*<b> Status Flag </b>    <span style="color:Blue"> <i> OUTPUT </i></span>
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:{| height=”50”
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|width=150pt |<i> BoolType </i>
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|width=100pt | <span style="color:Crimson"> <b> rr_clear </b></span>
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|width=100pt | (1 bits)
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|}

Latest revision as of 01:13, 18 May 2009

THIS PAGE IS UNDER CONSTUCTION

Fetch Engine

Branch Predictor I/F

  • BPredRecoveryType OUTPUT
BoolType miss (1 bits)
BoolType taken (1 bits)
AddrType target_PC (32 bits)
AddrType addrs (32 bits)
BPredStateType state (9 bits)
  • Status Flag OUTPUT
BoolType rr_empty (1 bits)

Crack I/F

  • DInst_CRType INPUT
BoolType valid (1 bits)
BoolType slow (1 bits)
OPType op 10 bits)
IMMType imm (32 bits)
BoolType expop (1 bits)
BoolType cexc (1 bits)
BoolType aexc_clear (1 bits)
BoolType icc (1 bits)
BoolType useY (1 bits)
BPredStateType state (9 bits)
ClusterIdType id (3 bits)
LRegType ldest (7 bits)
LRegType lsrc1 (7 bits)
LRegType lsrc2 (7 bits)
  • Status Flag INPUT
BoolType sched_busy (1 bits)
  • Status Flag OUTPUT
BoolType rr_clear (1 bits)
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