Difference between revisions of "Main Page"
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=== [[Hierarchical Design]] === | === [[Hierarchical Design]] === | ||
| − | This is a tutorial on how to do floorplanning, and place and route. Essentially backend design and customization. The front-end synthesize is done with Synopsys Design Compiler and back-end is done with SOC Encounter. Both utilities are available on mosis4.cse.ucsc.edu or mada*, bacon servers. Coming Soon! | + | This is a tutorial on how to do floorplanning, and place and route. Essentially backend design and customization. The front-end synthesize is done with Synopsys Design Compiler and back-end is done with SOC Encounter. Follwoing this tutorial will lead to a final GDSII of your layout. Both utilities are available on mosis4.cse.ucsc.edu or mada*, bacon servers. Coming Soon! |
Consult the [http://meta.wikimedia.org/wiki/Help:Contents User's Guide] for information on using the wiki software. | Consult the [http://meta.wikimedia.org/wiki/Help:Contents User's Guide] for information on using the wiki software. | ||
Revision as of 19:35, 4 February 2008
Contents
Technology Setup
This descsribes how to configure the software on the MOSIS cluster (e.g. mosis4) and the private mada cluster to use all CAD tools.
Full-Custom Tutorials
This is a collection of tutorials primarily for CMPE222. These emphasize a full-custom chip design flow using the NCSU CDK and MOSIS SCMOS design rules.
Standard-Cell Tutorials
This is a collection of tutorials primarily for CMPE223. These emphasize a standard-cell chip design flow using the Oaklahoma State cell library.
VLSI/Design Automation Group
Prof. Matthew Guthaus' research group.
Paper/Thesis Guide
Some useful information on how I recommend to write/edit papers.
VLSI Reading Group
Starting in Winter 2008, there will be a weekly seminar (CMPE 280G) on VLSI and Design Automation. This is where the schedule and possible papers are organized.
Hierarchical Design
This is a tutorial on how to do floorplanning, and place and route. Essentially backend design and customization. The front-end synthesize is done with Synopsys Design Compiler and back-end is done with SOC Encounter. Follwoing this tutorial will lead to a final GDSII of your layout. Both utilities are available on mosis4.cse.ucsc.edu or mada*, bacon servers. Coming Soon!
Consult the User's Guide for information on using the wiki software.
