Difference between revisions of "Main Page"

Revision as of 16:32, 9 January 2009

This descsribes how to configure the software on the MOSIS cluster (e.g. mosis4 and mosis3) and the private mada cluster to use all CAD tools.

A collection of custom, ASIC, FPGA, and Mixed-Signal tutorials.

SESC architectural simulator with performance, power, and thermal models (SescTherm).

Santa Cruz Out-of-Order Risc Engine (SCOORE) processor description and synthesis flow.

Consult the User's Guide for information on using the wiki software.

@@ Line 3: / Line 3: @@
 This descsribes how to configure the software on the MOSIS cluster (e.g. mosis4 and mosis3) and the private mada cluster to use all CAD tools.
-=== [[Full-Custom Tutorials]] ===
+=== [[Tutorials]] ===
-This is a collection of tutorials primarily for [http://www.soe.ucsc.edu/classes/cmpe222/ CMPE222]. These emphasize a full-custom chip design flow using the [http://www.eda.ncsu.edu/wiki/NCSU_CDK NCSU CDK] and [http://www.mosis.com/Technical/Designrules/scmos/scmos-main.html MOSIS SCMOS] design rules.
+A collection of custom, ASIC, FPGA, and Mixed-Signal tutorials.
-=== [[Standard-Cell Tutorials]] ===
-This is a collection of tutorials primarily for [http://www.soe.ucsc.edu/classes/cmpe125 CMPE 125/L], [http://www.soe.ucsc.edu/classes/cmpe126 CMPE 126/L] and [http://www.soe.ucsc.edu/classes/cmpe223 CMPE223]. These emphasize a standard-cell chip design flow using the Oaklahoma State cell library.
-=== [[DFM Tutorials]] ===
-This is how to do design for manufacturability (DFM).
-=== [[Analog/Mixed Signal]] ===
-This should grow to be a collection of Verilog/Verilog-A/Verilog-AMS material including setup, simulation, and testing.
 === [[SESC]] ===