Difference between revisions of "280G F09"

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* Each week, one person will present TWO papers. Everyone only presents one day.  
 
* Each week, one person will present TWO papers. Everyone only presents one day.  
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* You must select papers that are from 2009 in top conferences.
+
* You must select papers that are less than one year old and in top conferences.
 
* You must think that the papers are VERY GOOD. To do this, you need to read the paper BEFORE you select it for the group. You may need to read several papers to find a good one.
 
* You must think that the papers are VERY GOOD. To do this, you need to read the paper BEFORE you select it for the group. You may need to read several papers to find a good one.
 
* You must post your papers one week prior to your presentation.
 
* You must post your papers one week prior to your presentation.
  
−
==Winter 2009==
 
 
{| border="1"
 
{| border="1"
 
|-
 
|-
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|-
 
|-
 
| 9/29/09
 
| 9/29/09
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| Sheldon Logan(VLSI-SOC practice)
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| Sheldon Logan, Keven Woo
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|
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| VLSI-SOC & ICCD practice
 
|-
 
|-
 
| 10/6/09
 
| 10/6/09
 
| Seokjoong Kim
 
| Seokjoong Kim
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| Lide Zhang, Robert P. Dick, [http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=4796528 Scheduled voltage scaling for increasing lifetime in the presence of NBTI], ASP-DAC 2009  
+
| 1. Lide Zhang, Robert P. Dick, [http://portal.acm.org/ft_gateway.cfm?id=1509750&type=pdf&coll=GUIDE&dl=GUIDE&CFID=54152666&CFTOKEN=66311239 Scheduled voltage scaling for increasing lifetime in the presence of NBTI], ASP-DAC 2009, 2. Yu Wang et al, [http://www.date-conference.com/archive/conference/proceedings/PAPERS/2009/DATE09/PDFFILES/04.2_1.PDF Gate Replacement Techniques for Simultaneous Leakage and Aging Optimization], DATE2009
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One more
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|-
 
|-
 
| 10/13/09
 
| 10/13/09
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|-
 
|-
 
| 10/20/09
 
| 10/20/09
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| Keven L. Woo
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| Matthew Guthaus
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|
+
| How to review a research paper. [http://vlsida.soe.ucsc.edu/how_to_review_papers.pdf Slides]
−
|-
+
|-  
 
| 10/27/09
 
| 10/27/09
−
|  
+
| Keven Woo
−
|
+
|1. Yu Hu, Zhe Feng, Lei He, and Rupak Majumdar [http://www.ee.ucla.edu/~hu/pub/iccad08_robust.pdf Robust FPGA Resynthesis Based on Fault-Tolerant Boolean Matching] ICCAD 2008, 2. Shantanu Gupta, Amina Ansari, Shuguang Feng and Scott Maklhe [http://iccd.et.tudelft.nl/2009/proceedings/343Gupta.pdf Adaptive Online Testing for Efficient Hard Fault Detection] ICCD 09
 
|-
 
|-
 
| 11/03/09
 
| 11/03/09
 
| Sheldon Logan
 
| Sheldon Logan
−
|
+
|1. Yufu Zhang and Ankur Srivastava [http://users.soe.ucsc.edu/~slogan/096.pdf Accurate Temperature Estimation Using Noisy Thermal Sensors] DAC 2009 2. Xin Li, Yuchun Ma and Xianlong Hong [http://users.soe.ucsc.edu/~slogan/ASPDAC09.pdf A Novel Thermal Optimization Flow Using Incremental Floorplanning for 3D ICs] ASPDAC 2009.
 
|-
 
|-
 
| 11/10/09
 
| 11/10/09
−
| Xuchu Hu
+
| Jas Condley
−
|
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|1. Tharaka Dissanayake, Karu P. Esselle and Mehmet R. Yuce [http://www.eng.newcastle.edu.au/~mry122/IEEE_TMTT_UWBImplantantenna.pdf Dielectric Loaded Impedance Matching for Wideband Implanted Antennas] IEEE Transactions on Microwave Theory and Techniques (Oct 2009).
 +
2. Amirhossein Alimohammad and Bruce F. Cockburn [http://portal.acm.org/ft_gateway.cfm?id=1630126&type=pdf&coll=GUIDE&dl=GUIDE&CFID=59832350&CFTOKEN=93028645 FPGA-based Accelerator for the Verification of Leading-Edge Wireless Systems] DAC 2009.
 
|-
 
|-
 
| 11/17/09
 
| 11/17/09
 
| Andrew W. Hill
 
| Andrew W. Hill
−
|
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|1. Anderson, JH. Najm, Farid.  [http://www.eecg.utoronto.ca/~najm/papers/tvlsi09-jason.pdf Low-Power Programmable FPGA Routing Circuitry] TVLSI 2009.
 +
2. Ling, Liu.  Olver, Neal. et. al. [http://portal.acm.org/ft_gateway.cfm?id=1508172&type=pdf&coll=GUIDE&dl=GUIDE&CFID=62850674&CFTOKEN=52540513 High-performance, energy-efficient platforms using in-socket FPGA accelerators] FPGA '09.
 
|-
 
|-
 
| 11/24/09
 
| 11/24/09
−
|  
+
| Marcelo Siero
−
|
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|1. Ankur Gupta, and Lyle N. Long, [http://www.google.com/url?sa=t&source=web&ct=res&cd=1&ved=0CA8QFjAA&url=http%3A%2F%2Fwww.personal.psu.edu%2Flnl%2Fpapers%2FGupta_Long_2007.pdf&ei=ZQEGS4r3OYH8sQO_rIHBCQ&usg=AFQjCNFN1wFJgla1apeQWYVCkRZ3CTIIWw&sig2=lvgVVlFMHJCsuRIoSk0j0Q Character Recognition using Spiking Neural Networks] IEEE Neural Networks Conference in Orlando Fla, Aug. 2007
 +
2. Jayawan H. B. Wijekoo and Piotr Dudek [http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=4541785&isnumber=4541329 Intetrated Circuit Implementation of a Cortical Neuron]a ] ISCAS 2008
 +
 
 +
3. Jayawan H. B. Wijekoo and Piotr Dudek [http://www.google.com/url?sa=t&source=web&ct=res&cd=3&ved=0CBYQFjAC&url=http%3A%2F%2Fpersonalpages.manchester.ac.uk%2Fstaff%2Fp.dudek%2Fpapers%2Fwijekoon-ijcnn2007.pdf&ei=bAIGS6_vBIOMswOK0JXBCQ&usg=AFQjCNH6aGvc7v1t7X96zCxW5K-XI4piiw&sig2=3K78haLTVHf3QiK6ydHkXA Spike and Bursting Firing Patterns of a Compact VLSI Cortical Neuron Circuit.] Proceeding of Intnl Joint Conference on NN, Orlando, Fla, USA, August 12-17, 2007
 +
 
 +
The 3rd paper is for reference only.  You may also wish to look at the wiki on Hebbian Learning.
 
|-
 
|-
 
| 12/1/09
 
| 12/1/09
−
|  
+
| Xuchu Hu
−
|
+
|1.Rupesh S. Shelar [http://portal.acm.org/citation.cfm?id=1514964 An algorithm for routing with capacitance/distance constraints for clock distribution in microprocessors] ISPD'09
−
|-
+
2.Xiaoji Ye, Srinath Narasimhan, Peng Li,  Leveraging efficient parallel pattern search for clock mesh optimization ICCAD'09. You can find the paper on ICCAD'09 disk on the shelf.
−
| 12/8/09
+
−
|
+
−
|
+
 
|-
 
|-
 
|}
 
|}

Latest revision as of 18:21, 30 November 2009

  • Each week, one person will present TWO papers. Everyone only presents one day.
  • You must select papers that are less than one year old and in top conferences.
  • You must think that the papers are VERY GOOD. To do this, you need to read the paper BEFORE you select it for the group. You may need to read several papers to find a good one.
  • You must post your papers one week prior to your presentation.
Date Presenter Paper
9/29/09 Sheldon Logan, Keven Woo VLSI-SOC & ICCD practice
10/6/09 Seokjoong Kim 1. Lide Zhang, Robert P. Dick, Scheduled voltage scaling for increasing lifetime in the presence of NBTI, ASP-DAC 2009, 2. Yu Wang et al, Gate Replacement Techniques for Simultaneous Leakage and Aging Optimization, DATE2009
10/13/09 No 280G (VLSI-SOC conference)
10/20/09 Matthew Guthaus How to review a research paper. Slides
10/27/09 Keven Woo 1. Yu Hu, Zhe Feng, Lei He, and Rupak Majumdar Robust FPGA Resynthesis Based on Fault-Tolerant Boolean Matching ICCAD 2008, 2. Shantanu Gupta, Amina Ansari, Shuguang Feng and Scott Maklhe Adaptive Online Testing for Efficient Hard Fault Detection ICCD 09
11/03/09 Sheldon Logan 1. Yufu Zhang and Ankur Srivastava Accurate Temperature Estimation Using Noisy Thermal Sensors DAC 2009 2. Xin Li, Yuchun Ma and Xianlong Hong A Novel Thermal Optimization Flow Using Incremental Floorplanning for 3D ICs ASPDAC 2009.
11/10/09 Jas Condley 1. Tharaka Dissanayake, Karu P. Esselle and Mehmet R. Yuce Dielectric Loaded Impedance Matching for Wideband Implanted Antennas IEEE Transactions on Microwave Theory and Techniques (Oct 2009).

2. Amirhossein Alimohammad and Bruce F. Cockburn FPGA-based Accelerator for the Verification of Leading-Edge Wireless Systems DAC 2009.

11/17/09 Andrew W. Hill 1. Anderson, JH. Najm, Farid. Low-Power Programmable FPGA Routing Circuitry TVLSI 2009.

2. Ling, Liu. Olver, Neal. et. al. High-performance, energy-efficient platforms using in-socket FPGA accelerators FPGA '09.

11/24/09 Marcelo Siero 1. Ankur Gupta, and Lyle N. Long, Character Recognition using Spiking Neural Networks IEEE Neural Networks Conference in Orlando Fla, Aug. 2007

2. Jayawan H. B. Wijekoo and Piotr Dudek Intetrated Circuit Implementation of a Cortical Neurona ] ISCAS 2008

3. Jayawan H. B. Wijekoo and Piotr Dudek Spike and Bursting Firing Patterns of a Compact VLSI Cortical Neuron Circuit. Proceeding of Intnl Joint Conference on NN, Orlando, Fla, USA, August 12-17, 2007

The 3rd paper is for reference only. You may also wish to look at the wiki on Hebbian Learning.

12/1/09 Xuchu Hu 1.Rupesh S. Shelar An algorithm for routing with capacitance/distance constraints for clock distribution in microprocessors ISPD'09

2.Xiaoji Ye, Srinath Narasimhan, Peng Li, Leveraging efficient parallel pattern search for clock mesh optimization ICCAD'09. You can find the paper on ICCAD'09 disk on the shelf.

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