Difference between revisions of "280G W10"

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(Created page with '* You may only take this class Pass/Fail. (If you do not, you will receive a non-passing grade.) * Each week, one person will present TWO papers. Everyone only presents one day. …')
 
 
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* You may only take this class Pass/Fail. (If you do not, you will receive a non-passing grade.)
 
* You may only take this class Pass/Fail. (If you do not, you will receive a non-passing grade.)
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* Each week, one person will present TWO papers. Everyone only presents one day.  
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* Each week, one person will present ONE paper. Everyone only presents one day.  
 
* You must select papers that are less than one year old and in top conferences.
 
* You must select papers that are less than one year old and in top conferences.
 
* You must think that the papers are VERY GOOD. To do this, you need to read the paper BEFORE you select it for the group. You may need to read several papers to find a good one.
 
* You must think that the papers are VERY GOOD. To do this, you need to read the paper BEFORE you select it for the group. You may need to read several papers to find a good one.
 
* You must post your papers one week prior to your presentation.
 
* You must post your papers one week prior to your presentation.
  
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==Winter 2009==
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{| border="1"
 
{| border="1"
 
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! Paper
 
! Paper
 
|-
 
|-
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| 9/29/09
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| 01/05/10
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| Sheldon Logan, Keven Woo
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| None
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| VLSI-SOC & ICCD practice
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| Group Meeting
 
|-
 
|-
−
| 10/6/09
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| 01/12/10
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| Seokjoong Kim
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| None
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| 1. Lide Zhang, Robert P. Dick, [http://portal.acm.org/ft_gateway.cfm?id=1509750&type=pdf&coll=GUIDE&dl=GUIDE&CFID=54152666&CFTOKEN=66311239 Scheduled voltage scaling for increasing lifetime in the presence of NBTI], ASP-DAC 2009, 2. Yu Wang et al, [http://www.date-conference.com/archive/conference/proceedings/PAPERS/2009/DATE09/PDFFILES/04.2_1.PDF Gate Replacement Techniques for Simultaneous Leakage and Aging Optimization], DATE2009
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| mrg Out of Town
 
|-
 
|-
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| 10/13/09
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| 01/19/10
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| No 280G (VLSI-SOC conference)
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| Keven
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|
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| Zhe Feng, Yu Hu, Lei He, and Rupak Majumdar [http://eda.ee.ucla.edu/pub/C134.pdf IPR: In-Place Reconfiguration for FPGA Fault Tolerance] ICCAD 2009
 
|-
 
|-
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| 10/20/09
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| 01/26/10
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| Matthew Guthaus
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| Jas
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| How to review a research paper. [http://vlsida.soe.ucsc.edu/how_to_review_papers.pdf Slides]
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| B. Taskin, J. Demaio, O. Farell, M. Hazeltine, and R. Ketner, [http://portal.acm.org/citation.cfm?doid=1529255.1529266 "Custom topology rotary clock router with tree subnetworks,"] ACM Transactions on Design Automation of Electronic Systems, vol. 14, 2009, pp. 1-14.
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|-
+
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| 10/27/09
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−
| Keven Woo
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|1. Yu Hu, Zhe Feng, Lei He, and Rupak Majumdar [http://www.ee.ucla.edu/~hu/pub/iccad08_robust.pdf Robust FPGA Resynthesis Based on Fault-Tolerant Boolean Matching] ICCAD 2008, 2. Shantanu Gupta, Amina Ansari, Shuguang Feng and Scott Maklhe [http://iccd.et.tudelft.nl/2009/proceedings/343Gupta.pdf Adaptive Online Testing for Efficient Hard Fault Detection] ICCD 09
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|-
 
|-
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| 11/03/09
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| 02/02/10
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| Sheldon Logan
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| None
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|1. Yufu Zhang and Ankur Srivastava [http://users.soe.ucsc.edu/~slogan/096.pdf Accurate Temperature Estimation Using Noisy Thermal Sensors] DAC 2009 2. Xin Li, Yuchun Ma and Xianlong Hong [http://users.soe.ucsc.edu/~slogan/ASPDAC09.pdf A Novel Thermal Optimization Flow Using Incremental Floorplanning for 3D ICs] ASPDAC 2009.
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| No class, since we have too many dates.
 
|-
 
|-
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| 11/10/09
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| 02/09/10
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| Jas Condley
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| Sheldon
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|1. Tharaka Dissanayake, Karu P. Esselle and Mehmet R. Yuce [http://www.eng.newcastle.edu.au/~mry122/IEEE_TMTT_UWBImplantantenna.pdf Dielectric Loaded Impedance Matching for Wideband Implanted Antennas] IEEE Transactions on Microwave Theory and Techniques (Oct 2009).
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|Yao-Wen Chang,Po-Wei Lee and Yi-Lin Chuang.[http://portal.acm.org/citation.cfm?id=1687523 "Voltage-drop aware analytical placement by global power spreading for mixed-size circuit designs,"] ICCAD 2009
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2. Amirhossein Alimohammad and Bruce F. Cockburn [http://portal.acm.org/ft_gateway.cfm?id=1630126&type=pdf&coll=GUIDE&dl=GUIDE&CFID=59832350&CFTOKEN=93028645 FPGA-based Accelerator for the Verification of Leading-Edge Wireless Systems] DAC 2009.
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|-
 
|-
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| 11/17/09
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| 02/16/10
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| Andrew W. Hill
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| Ian
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|1. Anderson, JH. Najm, Farid. [http://www.eecg.utoronto.ca/~najm/papers/tvlsi09-jason.pdf Low-Power Programmable FPGA Routing Circuitry] TVLSI 2009.
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| Chen, T.-C., Liao, G.-W., Chang, Y.-W. [http://ieeexplore.ieee.org/search/srchabstract.jsp?navigation=no&arnumber=5356285 "Predictive Pormulae for OPC With Applications to Lithography-Friendly Routing"] IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 2009
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2. Ling, Liu.  Olver, Neal. et. al. [http://portal.acm.org/ft_gateway.cfm?id=1508172&type=pdf&coll=GUIDE&dl=GUIDE&CFID=62850674&CFTOKEN=52540513 High-performance, energy-efficient platforms using in-socket FPGA accelerators] FPGA '09.
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|-
 
|-
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| 11/24/09
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| 02/25/10
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| Marcelo Siero
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| Seokjoong
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|1. Ankur Gupta, and Lyle N. Long, [http://www.google.com/url?sa=t&source=web&ct=res&cd=1&ved=0CA8QFjAA&url=http%3A%2F%2Fwww.personal.psu.edu%2Flnl%2Fpapers%2FGupta_Long_2007.pdf&ei=ZQEGS4r3OYH8sQO_rIHBCQ&usg=AFQjCNFN1wFJgla1apeQWYVCkRZ3CTIIWw&sig2=lvgVVlFMHJCsuRIoSk0j0Q Character Recognition using Spiking Neural Networks] IEEE Neural Networks Conference in Orlando Fla, Aug. 2007
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| Presentation Practice for Qualification (NOTE: This is on THURSDAY)
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2. Jayawan H. B. Wijekoo and Piotr Dudek [http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=4541785&isnumber=4541329 Intetrated Circuit Implementation of a Cortical Neuron]a ] ISCAS 2008
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|-
−
 
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| 03/02/10
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3. Jayawan H. B. Wijekoo and Piotr Dudek [http://www.google.com/url?sa=t&source=web&ct=res&cd=3&ved=0CBYQFjAC&url=http%3A%2F%2Fpersonalpages.manchester.ac.uk%2Fstaff%2Fp.dudek%2Fpapers%2Fwijekoon-ijcnn2007.pdf&ei=bAIGS6_vBIOMswOK0JXBCQ&usg=AFQjCNH6aGvc7v1t7X96zCxW5K-XI4piiw&sig2=3K78haLTVHf3QiK6ydHkXA Spike and Bursting Firing Patterns of a Compact VLSI Cortical Neuron Circuit.] Proceeding of Intnl Joint Conference on NN, Orlando, Fla, USA, August 12-17, 2007
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| Xuchu
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| Presentation Practice for Qualification
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The 3rd paper is for reference only.  You may also wish to look at the wiki on Hebbian Learning.
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|-
 
|-
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| 12/1/09
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| 03/09/10
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| Xuchu Hu
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| Andrew
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|1.Rupesh S. Shelar [http://portal.acm.org/citation.cfm?id=1514964 An algorithm for routing with capacitance/distance constraints for clock distribution in microprocessors] ISPD'09
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| Shafique et al.[http://portal.acm.org/ft_gateway.cfm?id=1687411&type=pdf&coll=GUIDE&dl=GUIDE&CFID=81090791&CFTOKEN=39560470 "REMiS: Run-time Energy Minimization Scheme in a Reconfigurable Processor with Dynamic Power-Gated Instruction Set"]. International Conference on Computer Aided Design (2009)
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2.Xiaoji Ye, Srinath Narasimhan, Peng Li,  Leveraging efficient parallel pattern search for clock mesh optimization ICCAD'09. You can find the paper on ICCAD'09 disk on the shelf.
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|-
 
|-
 +
| 03/18/10 2:30pm
 +
| Derek
 +
| ISQED dry run (NOTE: This is on THURSDAY)
 
|}
 
|}

Latest revision as of 16:29, 9 March 2010

  • You may only take this class Pass/Fail. (If you do not, you will receive a non-passing grade.)
  • Each week, one person will present ONE paper. Everyone only presents one day.
  • You must select papers that are less than one year old and in top conferences.
  • You must think that the papers are VERY GOOD. To do this, you need to read the paper BEFORE you select it for the group. You may need to read several papers to find a good one.
  • You must post your papers one week prior to your presentation.


Date Presenter Paper
01/05/10 None Group Meeting
01/12/10 None mrg Out of Town
01/19/10 Keven Zhe Feng, Yu Hu, Lei He, and Rupak Majumdar IPR: In-Place Reconfiguration for FPGA Fault Tolerance ICCAD 2009
01/26/10 Jas B. Taskin, J. Demaio, O. Farell, M. Hazeltine, and R. Ketner, "Custom topology rotary clock router with tree subnetworks," ACM Transactions on Design Automation of Electronic Systems, vol. 14, 2009, pp. 1-14.
02/02/10 None No class, since we have too many dates.
02/09/10 Sheldon Yao-Wen Chang,Po-Wei Lee and Yi-Lin Chuang."Voltage-drop aware analytical placement by global power spreading for mixed-size circuit designs," ICCAD 2009
02/16/10 Ian Chen, T.-C., Liao, G.-W., Chang, Y.-W. "Predictive Pormulae for OPC With Applications to Lithography-Friendly Routing" IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 2009
02/25/10 Seokjoong Presentation Practice for Qualification (NOTE: This is on THURSDAY)
03/02/10 Xuchu Presentation Practice for Qualification
03/09/10 Andrew Shafique et al."REMiS: Run-time Energy Minimization Scheme in a Reconfigurable Processor with Dynamic Power-Gated Instruction Set". International Conference on Computer Aided Design (2009)
03/18/10 2:30pm Derek ISQED dry run (NOTE: This is on THURSDAY)
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