Difference between revisions of "280G S10"
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| 03/30/10 | | 03/30/10 | ||
− | | | + | | NONE |
| | | | ||
|- | |- | ||
− | | 04/ | + | | 04/07/10 (Wednesday, 2pm, Baskin 330) |
− | | | + | | Dr. Cliff Sze |
− | | | + | | [http://www.soe.ucsc.edu/news/event?ID=1911 Timing Driven Physical Synthesis and Clock Network Synthesis in IBM] |
|- | |- | ||
| 04/13/10 | | 04/13/10 | ||
− | | | + | | Ian Lee |
− | | | + | | [http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=5401217 Optical Lithography Simulation with Focus Variation using Wavelet Transform] |
|- | |- | ||
| 04/20/10 | | 04/20/10 | ||
+ | | NONE | ||
| | | | ||
− | | | + | |- |
+ | | 04/21/10 (Wednesday, 4pm, Baskin 330) | ||
+ | | Prof. Jennifer Dworak | ||
+ | | TBD | ||
|- | |- | ||
| 04/27/10 | | 04/27/10 | ||
− | | | + | | NONE |
| | | | ||
|- | |- | ||
| 05/04/10 | | 05/04/10 | ||
− | | | + | | Seokjoong |
− | | | + | | [http://delivery.acm.org/10.1145/1690000/1687490/p478-chong.pdf Nanoelectromechanical (NEM) Relays Integrated with CMOS SRAM for Improved Stability and Low Leakage] |
|- | |- | ||
| 05/11/10 | | 05/11/10 | ||
| Sheldon Logan | | Sheldon Logan | ||
− | | | + | | [http://portal.acm.org/citation.cfm?id=1629962 Fast vectorless power grid verification using an approximate inverse technique] |
+ | |- | ||
+ | | 05/17/10 (Monday, 3pm, E2-399) | ||
+ | | Dr. Rasit Topaloglu | ||
+ | | 3D-IC Design for Manufacturability and High Performance Computing | ||
|- | |- | ||
| 05/18/10 | | 05/18/10 | ||
− | | | + | | Xuchu |
− | | | + | | [http://portal.acm.org/citation.cfm?id=1687502 Multi-level clustering for clock skew optimization (ICCAD2009)] |
|- | |- | ||
| 05/25/10 | | 05/25/10 | ||
− | | | + | | Marcelo Siero |
− | | | + | |[http://portal.acm.org.oca.ucsc.edu/citation.cfm?id=1509633.1509733 Fast circuit simulation on graphics processing units (Asia & South Pacific DAC 2009)] |
|- | |- | ||
| 06/01/10 | | 06/01/10 | ||
− | | | + | | Andrew |
− | | | + | | [http://icdesign.iis.u-tokyo.ac.jp/2010_5.pdf Difficulty of Power Supply Voltage Scaling in Large Scale Subthreshold Logic Circuits (IEICE Transactions on Electronics, 2010)] |
+ | |- | ||
+ | | 06/08/10 | ||
+ | | Jas and Matt | ||
+ | | SLIP and DAC practice talks | ||
|} | |} |
Latest revision as of 20:39, 31 May 2010
- You may only take this class Pass/Fail. (If you do not, you will receive a non-passing grade.)
- Each week, one person will present ONE paper. Everyone only presents one day.
- You must select papers that are less than one year old and in top conferences.
- You must think that the papers are VERY GOOD. To do this, you need to read the paper BEFORE you select it for the group. You may need to read several papers to find a good one.
- You must post your papers one week prior to your presentation.