Difference between revisions of "RAKE"

From Vlsiwiki
Jump to: navigation, search
(Created page with '**Rake wiki standard directory structure (ie scoore/fpu) asic asic related bist docs all documentation rtl all verilog code scripts any special scripts tests …')
 
 
Line 1: Line 1:
**Rake wiki
+
*Rake wiki<BR>                                                                                                                                                                                               
 
+
<BR>                                                                                                                                                                                                         
 
+
<BR>                                                                                                                                                                                                         
standard directory structure (ie scoore/fpu)
+
standard directory structure (ie scoore/fpu)<BR>
asic asic related
+
asic                           asic related<BR>
bist
+
bist                           <BR>
docs all documentation
+
docs                           all documentation<BR>
rtl all verilog code
+
rtl                             all verilog code<BR>
scripts any special scripts
+
scripts                         any special scripts<BR>
tests all testbench code
+
tests                           all testbench code<BR>
TODO future todo text file
+
TODO                           future todo text file<BR>
 
+
<BR>
run rake in 'main' directory
+
run rake in 'main' directory<BR>
rake parses the .xml file which is named 'dir name'.xml
+
rake parses the .xml file which is named 'dir name'.xml<BR>
 
+
<BR>
xml files contain 3 different target types
+
xml files contain 3 different target types<BR>
asic synplify
+
asic                   synplify<BR>
fpga synplify
+
fpga                   synplify<BR>
testbenches VCS / Modelsim
+
testbenches             VCS / Modelsim<BR>
 
+
<BR>
running rake in a main directory with no parameters shows all possible targets.
+
running rake in a main directory with no parameters shows all possible targets.<BR>
 
+
<BR>
Some important rake options
+
Some important rake options<BR>
to view the commands rake invokes (Usefull for debugging), use v=1 rake option (requires a target ie. test:all)
+
to view the commands rake invokes (Usefull for debugging), use v=1 rake option (requires a target ie. test:all)<BR>
 
+
<BR>
For testbenching:
+
For testbenching:<BR>
rake will invoke the vcs command, this compiles all RTL and C++ testbench files, to create a ./simv executable (which is the compiled tb)
+
rake will invoke the vcs command, this compiles all RTL and C++ testbench files, to create a ./simv executable (which is the compiled tb)<BR>
 
+
<BR>
To change simulators, we can tell rake to use Modelsim instead (VCS is the default)
+
To change simulators, we can tell rake to use Modelsim instead (VCS is the default)<BR>
rake test:all suite=vsim
+
        rake test:all suite=vsim<BR>
 
+
<BR>
To launch the GUI, use the rake option gui=1
+
To launch the GUI, use the rake option gui=1<BR>
rake test:all gui=1
+
        rake test:all gui=1<BR>
 
+
<BR>
DVE: VCS GUI tutorial (start from page 6) http://www-inst.eecs.berkeley.edu/~cs250/fa09/handouts/tut4-vcs.pdf
+
DVE: VCS GUI tutorial (start from page 6) http://www-inst.eecs.berkeley.edu/~cs250/fa09/handouts/tut4-vcs.pdf<BR>
 
+
<BR>
When passing parameters to your testbench:
+
When passing parameters to your testbench:<BR>
rake does not yet allow for parameters to be passed to the simulator.
+
        rake does not yet allow for parameters to be passed to the simulator.<BR>
 
+
<BR>
Work around:
+
        Work around:<BR>
rake test:softfloat_tb v=1
+
                rake test:softfloat_tb v=1<BR>
then copy and paste the vcs command
+
                then copy and paste the vcs command<BR>
run it
+
                run it<BR>
+
                <BR>
This will compile the tb to make it fresh.
+
                This will compile the tb to make it fresh.<BR>
Now the tb executable has been created (./simv or ./vsim)
+
                Now the tb executable has been created (./simv or ./vsim)<BR>
pass parameters to executable (ie ./simv +test=float64_add)
+
                pass parameters to executable (ie ./simv +test=float64_add)<BR>
 
+
<BR>
Look at the ATC wiki for cycle accurate testbench example https://vlsiwiki.soe.ucsc.edu/index.php/ATC
+
Look at the ATC wiki for cycle accurate testbench example https://vlsiwiki.soe.ucsc.edu/index.php/ATC<BR>
 
+
<BR>
To interrupt a running simulation, press ctrl-C, this will dump you into the simulator console, type quit to exit
+
To interrupt a running simulation, press ctrl-C, this will dump you into the simulator console, type quit to exit<BR>
 +
<BR>
 +
<BR>

Latest revision as of 00:37, 9 April 2010

  • Rake wiki



standard directory structure (ie scoore/fpu)
asic asic related
bist
docs all documentation
rtl all verilog code
scripts any special scripts
tests all testbench code
TODO future todo text file

run rake in 'main' directory
rake parses the .xml file which is named 'dir name'.xml

xml files contain 3 different target types
asic synplify
fpga synplify
testbenches VCS / Modelsim

running rake in a main directory with no parameters shows all possible targets.

Some important rake options
to view the commands rake invokes (Usefull for debugging), use v=1 rake option (requires a target ie. test:all)

For testbenching:
rake will invoke the vcs command, this compiles all RTL and C++ testbench files, to create a ./simv executable (which is the compiled tb)

To change simulators, we can tell rake to use Modelsim instead (VCS is the default)

       rake test:all suite=vsim


To launch the GUI, use the rake option gui=1

       rake test:all gui=1


DVE: VCS GUI tutorial (start from page 6) http://www-inst.eecs.berkeley.edu/~cs250/fa09/handouts/tut4-vcs.pdf

When passing parameters to your testbench:

       rake does not yet allow for parameters to be passed to the simulator.


       Work around:
rake test:softfloat_tb v=1
then copy and paste the vcs command
run it

This will compile the tb to make it fresh.
Now the tb executable has been created (./simv or ./vsim)
pass parameters to executable (ie ./simv +test=float64_add)


Look at the ATC wiki for cycle accurate testbench example https://vlsiwiki.soe.ucsc.edu/index.php/ATC

To interrupt a running simulation, press ctrl-C, this will dump you into the simulator console, type quit to exit