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| | | 9/29/09 | | | 9/29/09 |
| − | | Sheldon Logan, Keven Woo | + | | Name |
| − | | VLSI-SOC & ICCD practice | + | | Topic |
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| − | | 10/6/09
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| − | | Seokjoong Kim
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| − | | 1. Lide Zhang, Robert P. Dick, [http://portal.acm.org/ft_gateway.cfm?id=1509750&type=pdf&coll=GUIDE&dl=GUIDE&CFID=54152666&CFTOKEN=66311239 Scheduled voltage scaling for increasing lifetime in the presence of NBTI], ASP-DAC 2009, 2. Yu Wang et al, [http://www.date-conference.com/archive/conference/proceedings/PAPERS/2009/DATE09/PDFFILES/04.2_1.PDF Gate Replacement Techniques for Simultaneous Leakage and Aging Optimization], DATE2009
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| − | | 10/13/09
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| − | | No 280G (VLSI-SOC conference)
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| − | | 10/20/09
| + | |
| − | | Matthew Guthaus
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| − | | How to review a research paper. [http://vlsida.soe.ucsc.edu/how_to_review_papers.pdf Slides]
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| − | | 10/27/09
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| − | | Keven Woo
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| − | |1. Yu Hu, Zhe Feng, Lei He, and Rupak Majumdar [http://www.ee.ucla.edu/~hu/pub/iccad08_robust.pdf Robust FPGA Resynthesis Based on Fault-Tolerant Boolean Matching] ICCAD 2008, 2. Shantanu Gupta, Amina Ansari, Shuguang Feng and Scott Maklhe [http://iccd.et.tudelft.nl/2009/proceedings/343Gupta.pdf Adaptive Online Testing for Efficient Hard Fault Detection] ICCD 09
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| − | | 11/03/09
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| − | | Sheldon Logan
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| − | |1. Yufu Zhang and Ankur Srivastava [http://users.soe.ucsc.edu/~slogan/096.pdf Accurate Temperature Estimation Using Noisy Thermal Sensors] DAC 2009 2. Xin Li, Yuchun Ma and Xianlong Hong [http://users.soe.ucsc.edu/~slogan/ASPDAC09.pdf A Novel Thermal Optimization Flow Using Incremental Floorplanning for 3D ICs] ASPDAC 2009.
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| − | | 11/10/09
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| − | | Jas Condley
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| − | |1. Tharaka Dissanayake, Karu P. Esselle and Mehmet R. Yuce [http://www.eng.newcastle.edu.au/~mry122/IEEE_TMTT_UWBImplantantenna.pdf Dielectric Loaded Impedance Matching for Wideband Implanted Antennas] IEEE Transactions on Microwave Theory and Techniques (Oct 2009).
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| − | 2. Amirhossein Alimohammad and Bruce F. Cockburn [http://portal.acm.org/ft_gateway.cfm?id=1630126&type=pdf&coll=GUIDE&dl=GUIDE&CFID=59832350&CFTOKEN=93028645 FPGA-based Accelerator for the Verification of Leading-Edge Wireless Systems] DAC 2009.
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| − | |-
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| − | | 11/17/09
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| − | | Andrew W. Hill
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| − | |1. Anderson, JH. Najm, Farid. [http://www.eecg.utoronto.ca/~najm/papers/tvlsi09-jason.pdf Low-Power Programmable FPGA Routing Circuitry] TVLSI 2009.
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| − | 2. Ling, Liu. Olver, Neal. et. al. [http://portal.acm.org/ft_gateway.cfm?id=1508172&type=pdf&coll=GUIDE&dl=GUIDE&CFID=62850674&CFTOKEN=52540513 High-performance, energy-efficient platforms using in-socket FPGA accelerators] FPGA '09.
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| + | |
| − | | 11/24/09
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| − | | Marcelo Siero
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| − | |1. Ankur Gupta, and Lyle N. Long, [http://www.google.com/url?sa=t&source=web&ct=res&cd=1&ved=0CA8QFjAA&url=http%3A%2F%2Fwww.personal.psu.edu%2Flnl%2Fpapers%2FGupta_Long_2007.pdf&ei=ZQEGS4r3OYH8sQO_rIHBCQ&usg=AFQjCNFN1wFJgla1apeQWYVCkRZ3CTIIWw&sig2=lvgVVlFMHJCsuRIoSk0j0Q Character Recognition using Spiking Neural Networks] IEEE Neural Networks Conference in Orlando Fla, Aug. 2007
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| − | 2. Jayawan H. B. Wijekoo and Piotr Dudek [http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=4541785&isnumber=4541329 Intetrated Circuit Implementation of a Cortical Neuron]a ] ISCAS 2008
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| − | 3. Jayawan H. B. Wijekoo and Piotr Dudek [http://www.google.com/url?sa=t&source=web&ct=res&cd=3&ved=0CBYQFjAC&url=http%3A%2F%2Fpersonalpages.manchester.ac.uk%2Fstaff%2Fp.dudek%2Fpapers%2Fwijekoon-ijcnn2007.pdf&ei=bAIGS6_vBIOMswOK0JXBCQ&usg=AFQjCNH6aGvc7v1t7X96zCxW5K-XI4piiw&sig2=3K78haLTVHf3QiK6ydHkXA Spike and Bursting Firing Patterns of a Compact VLSI Cortical Neuron Circuit.] Proceeding of Intnl Joint Conference on NN, Orlando, Fla, USA, August 12-17, 2007
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| − | The 3rd paper is for reference only. You may also wish to look at the wiki on Hebbian Learning.
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| − | |-
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| − | | 12/1/09
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| − | | Xuchu Hu
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| − | |1.Rupesh S. Shelar [http://portal.acm.org/citation.cfm?id=1514964 An algorithm for routing with capacitance/distance constraints for clock distribution in microprocessors] ISPD'09
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| − | 2.Xiaoji Ye, Srinath Narasimhan, Peng Li, Leveraging efficient parallel pattern search for clock mesh optimization ICCAD'09. You can find the paper on ICCAD'09 disk on the shelf.
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| | |} | | |} |
