Difference between revisions of "280G S08"

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(New page: ===Spring 2008=== {| border="1" |- ! Date ! Presenter ! Paper |- | 4/7/08 | Rigo | S. N. Adya and I. L. Markov, "[http://vlsicad.eecs.umich.edu/BK/parquet/iccd_2001_floorplan.pdf Fixed-out...)
 
 
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=== Winter 2008 ===
 
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| 1/10/08
 
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| 1/17/08
 
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| Matt
 
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| M.R. Guthaus, D. Sylvester, R.B. Brown. [http://bacon.cse.ucsc.edu/papers/guthaus-aspdac08.pdf Clock Tree Synthesis with Data-path Sensitivity Matching], ASPDAC, Seoul, Korea, 2008, IN PRESS.
 
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| 1/24/08
 
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| 1/31/08
 
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| Yaron
 
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| Boyd, S. P. and Kim, S. J. [http://portal.acm.org/citation.cfm?id=1055148  Geometric programming for circuit optimization], In Proceedings of the 2005 international Symposium on Physical Design (San Francisco, California, USA, April 03 - 06, 2005). ISPD '05. ACM, New York, NY, 44-46.
 
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| 1/31/08
 
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| Rigo
 
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| F. Wang, X. Wu and Y. Xie, [http://bacon.cse.ucsc.edu/papers/aspdac_2008/p2_1A-1.pdf Variability-Driven Module Selection with Joint Design Time Optimization and Post-Silicon Tuning], ASPDAC 2008.
 
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| 2/07/08
 
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| 2/14/08
 
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| Sheldon
 
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| Ketan N. Patel, Igor L. Markov and John P. Hayes. [http://citeseer.ist.psu.edu/644440.html Evaluating Circuit Reliability Under Probabilistic Gate-Level Fault Models],  IWLS 2003.
 
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| 2/14/08
 
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| Keven
 
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| K.-C. Wu and D. Marculescu, [http://bacon.cse.ucsc.edu/papers/aspdac_2008/p559_7A-1.pdf Soft Error Rate Reduction Using Redundancy Addition and Removal ], ASPDAC 2008.
 
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| 2/21/08
 
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| Jeff
 
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| Liang, X., Turgay, K., and Brooks, D.  [http://portal.acm.org/citation.cfm?id=1326073.1326245&coll=&dl=GUIDE&type=series&idx=SERIES388&part=series&WantType=Proceedings&title=ICCAD# Architectural power models for SRAM and CAM structures based on hybrid analytical/empirical techniques]. ICCAD, 2007, pp 824-830. 
 
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| 2/21/08
 
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| Jeff
 
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| [http://www.ece.ubc.ca/~stevew/papers/html/jssc96/paper.html Cacti] 
 
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| 2/28/08
 
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| Mohammed
 
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| Wei Huang; Ghosh, S.; Velusamy, S.; Sankaranarayanan, K.; Skadron, K.; Stan, M.R., "[http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=1650228 HotSpot: a compact thermal modeling methodology for early-stage VLSI design]," Very Large Scale Integration (VLSI) Systems, IEEE Transactions on , vol.14, no.5, pp. 501-513, May 2006.
 
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| 2/28/08
 
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| Linh
 
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|  Xin Li,    Taylor, Brian    YuTsun Chien,    Pileggi, Lawrence T. [http://www.ieeexplore.ieee.org/xpls/abs_all.jsp?isnumber=4397223&arnumber=4397306&count=153&index=82 Adaptive post-silicon tuning for analog circuits: concept, analysis and optimization.] ICCAD 2007, pp 450-457.
 
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| 3/6/08
 
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| NO MEETING
 
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| 3/13/08
 
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| Janak H. Patel (UIUC)
 
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| CMOS Process Variations: A "Critical Operation Point" hypothesis 
 
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Latest revision as of 16:27, 9 January 2009

Spring 2008

Date Presenter Paper
4/7/08 Rigo S. N. Adya and I. L. Markov, "Fixed-outline Floorplanning Through Better Local Search" Int'l Conf. On Computer Design (ICCD 2001), pp.328-333.
4/7/08 Sheldon Rao, R. M., Liu, F., Burns, J. L., and Brown, R. B. A Heuristic to Determine Low Leakage Sleep State Vectors for CMOS Combinational Circuits. ICCAD, 2003, pp 689-697
4/14/08 No class (@ ISPD)
4/21/08 Matt Satisfiability (No Paper)
4/28/08 Derek Verilog-A & Current Work
5/5/08 - Out of Town
5/12/08 Jeff B. Mohammad, M. Saint-Laurent, P. Bassett, and J. Abraham. Cache Design for Low Power and High Yield. ISQED, 2008, pp 103-107.
5/19/08 Keven J. Sheaeffer D. Luebke K. Skadron A Hardware Redundancy and Recovery Mechanism for Reliable Scientific Computation on Graphics Processors. ACM, 2007
5/26/08 Nobody No class (Memorial Day)
6/2/08 - No Class
6/9/08 - No Class (@ DAC)
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