Standard-Cell Tutorials

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  1. OSU Technology Setup
  2. Other Technology Setups
  3. Synopsys Design Compiler
  4. Advanced Synopsys Design Compiler
  5. Simulating Verilog
  6. Cadence Encounter
  7. Hierarchical Design and Floorplanning
  8. Library Modification/Creation

For other tutorials, please see the OSU wiki.

Retrieved from "https://vlsiwiki.soe.ucsc.edu/index.php?title=Standard-Cell_Tutorials&oldid=508"

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