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| | + | __NOTOC__ |
| | ==Overview== | | ==Overview== |
| − | The reading group will meet in E2-209 once a week for approximately 1 hour. Students will be selected to present an informal discussion of a chosen paper. Credit for the seminar is given based on your participation. You are welcome to bring your lunch. | + | The reading group will weekly. Students will be selected to present an informal discussion of a chosen paper. Credit (pass/fail only) for the seminar is given based on your participation. |
| | | | |
| − | ==Participants== | + | ==Current Schedule== |
| − | * [http://www.soe.ucsc.edu/~mrg Matthew Guthaus]
| + | |
| − | * [http://www.soe.ucsc.edu/~rigo Rigo Dicochea]
| + | |
| − | * Sheldon Logan
| + | |
| − | * Jeren Semendari
| + | |
| − | * Keven Woo
| + | |
| − | * Derek C
| + | |
| | | | |
| − | ==Spring 2008==
| + | * [[280G W15]] |
| − | {| border="1"
| + | |
| − | |-
| + | |
| − | ! Date
| + | |
| − | ! Presenter
| + | |
| − | ! Paper
| + | |
| − | |-
| + | |
| − | | 4/7/08
| + | |
| − | | Rigo
| + | |
| − | | S. N. Adya and I. L. Markov, "[http://vlsicad.eecs.umich.edu/BK/parquet/iccd_2001_floorplan.pdf Fixed-outline Floorplanning Through Better Local Search]" Int'l Conf. On Computer Design (ICCD 2001), pp.328-333.
| + | |
| − | |-
| + | |
| − | | 4/7/08
| + | |
| − | | Sheldon
| + | |
| − | | Rao, R. M., Liu, F., Burns, J. L., and Brown, R. B. [http://ieeexplore.ieee.org/Xplore/login.jsp?url=/iel5/8895/28127/01257884.pdf?isnumber=28127&prod=CNF&arnumber=1257884&arSt=+689&ared=+692&arAuthor=Rao%2C+R.M.%3B+Liu%2C+F.%3B+Burns%2C+J.L.%3B+Brown%2C+R.B. A Heuristic to Determine Low Leakage Sleep State Vectors for CMOS Combinational Circuits]. ICCAD, 2003, pp 689-697
| + | |
| − | |-
| + | |
| − | | 4/14/08
| + | |
| − | |
| + | |
| − | | No class (@ ISPD)
| + | |
| − | |-
| + | |
| − | | 4/21/08
| + | |
| − | | Matt
| + | |
| − | | Satisfiability (No Paper)
| + | |
| − | |-
| + | |
| − | | 4/21/08
| + | |
| − | | ?
| + | |
| − | | TBD
| + | |
| − | |-
| + | |
| − | | 4/28/08
| + | |
| − | | ?
| + | |
| − | | TBD
| + | |
| − | |-
| + | |
| − | | 4/28/08
| + | |
| − | | ?
| + | |
| − | | TBD
| + | |
| − | |-
| + | |
| − | | 5/5/08
| + | |
| − | |
| + | |
| − | | No Class (@ DAC)
| + | |
| − | |-
| + | |
| − | | 5/12/08
| + | |
| − | | ?
| + | |
| − | | TBD
| + | |
| − | |-
| + | |
| − | | 5/12/08
| + | |
| − | | ?
| + | |
| − | | TBD
| + | |
| − | |-
| + | |
| − | | 5/19/08
| + | |
| − | | ?
| + | |
| − | | TBD
| + | |
| − | |-
| + | |
| − | | 5/19/08
| + | |
| − | | ?
| + | |
| − | | TBD
| + | |
| − | |-
| + | |
| − | | 5/26/08
| + | |
| − | | Nobody
| + | |
| − | | No class (Memorial Day)
| + | |
| − | |-
| + | |
| − | | 6/2/08
| + | |
| − | | ?
| + | |
| − | | TBD
| + | |
| − | |-
| + | |
| − | | 6/2/08
| + | |
| − | | ?
| + | |
| − | | TBD
| + | |
| | | | |
| − | |}
| + | ==Past Schedules== |
| − | | + | * [[280G F14]] |
| − | ==Potential Papers== | + | * [[280G W13]] |
| − | | + | * [[280G F12]] |
| − | | + | * [[280G S12]] |
| − | * A. B. Kahng, P. Sharma, and A. Zelikovsky, "[http://portal.acm.org/citation.cfm?id=1233639 Fill for Shallow Trench Isolation CMP]", Proc. ACM/IEEE Intl. Conf. on Computer-Aided Design, November 2006, pp. 661-668. | + | * [[280G F11]] |
| − | | + | * [[280G S11]] |
| − | * S., Srivastava, A., Sharma, D., Sylvester, D., Blaauw, D., and Zolotov, V. 2005. [http://portal.acm.org/citation.cfm?id=1129702&jmp=cit&coll=portal&dl=ACM&CFID=7564954&CFTOKEN=49489343 Discrete Vt assignment and gate sizing using a self-snapping continuous formulation]. In Proceedings of the 2005 IEEE/ACM international Conference on Computer-Aided Design (San Jose, CA, November 06 - 10, 2005). International Conference on Computer Aided Design. IEEE Computer Society, Washington, DC, 705-712. | + | * [[280G W11]] |
| − | | + | * [[280G F10]] |
| − | * Cong, J., Shinnerl, J. R., Xie, M., Kong, T., and Yuan, X. 2005. [http://portal.acm.org/citation.cfm?id=1059886 Large-scale circuit placement]. ACM Trans. Des. Autom. Electron. Syst. 10, 2 (Apr. 2005), 389-430. | + | * [[280G S10]] |
| − | | + | * [[280G W10]] |
| − | * S.-C. Chang, M. Marek-Sadowska, and K.-T. Cheng, [http://ieeexplore.ieee.org/iel1/11994/00552082.pdf Perturb and Simplify: Multi-level Boolean Network Optimizer], IEEE Transactions on CAD, vol. 15, no. 12, pp. 1494-1504, December 1996. | + | * [[280G F09]] |
| − | | + | * [[280G W09]] |
| − | * http://www.ece.rice.edu/~kmram/publications/dft03.pdf | + | * [[280G F08]] |
| − | | + | * [[280G S08]] |
| − | * Other papers from [http://bacon.cse.ucsc.edu/papers ICCAD 2007]. | + | * [[280G W08]] |
| − | | + | |
| − | | + | |
| − | == Old Schedules ==
| + | |
| − | === Winter 2008 ===
| + | |
| − | {| border="1"
| + | |
| − | |-
| + | |
| − | ! Date
| + | |
| − | ! Presenter
| + | |
| − | ! Paper
| + | |
| − | |-
| + | |
| − | | 1/10/08
| + | |
| − | | -
| + | |
| − | | NOT MEETING
| + | |
| − | |-
| + | |
| − | | 1/17/08
| + | |
| − | | Matt
| + | |
| − | | M.R. Guthaus, D. Sylvester, R.B. Brown. [http://bacon.cse.ucsc.edu/papers/guthaus-aspdac08.pdf Clock Tree Synthesis with Data-path Sensitivity Matching], ASPDAC, Seoul, Korea, 2008, IN PRESS.
| + | |
| − | |-
| + | |
| − | | 1/24/08
| + | |
| − | | -
| + | |
| − | | NOT MEETING
| + | |
| − | |-
| + | |
| − | | 1/31/08
| + | |
| − | | Yaron
| + | |
| − | | Boyd, S. P. and Kim, S. J. [http://portal.acm.org/citation.cfm?id=1055148 Geometric programming for circuit optimization], In Proceedings of the 2005 international Symposium on Physical Design (San Francisco, California, USA, April 03 - 06, 2005). ISPD '05. ACM, New York, NY, 44-46.
| + | |
| − | | + | |
| − | |-
| + | |
| − | | 1/31/08
| + | |
| − | | Rigo
| + | |
| − | | F. Wang, X. Wu and Y. Xie, [http://bacon.cse.ucsc.edu/papers/aspdac_2008/p2_1A-1.pdf Variability-Driven Module Selection with Joint Design Time Optimization and Post-Silicon Tuning], ASPDAC 2008.
| + | |
| − | |-
| + | |
| − | | 2/07/08
| + | |
| − | | -
| + | |
| − | | NOT MEETING
| + | |
| − | |-
| + | |
| − | | 2/14/08
| + | |
| − | | Sheldon
| + | |
| − | | Ketan N. Patel, Igor L. Markov and John P. Hayes. [http://citeseer.ist.psu.edu/644440.html Evaluating Circuit Reliability Under Probabilistic Gate-Level Fault Models], IWLS 2003.
| + | |
| − | |-
| + | |
| − | | 2/14/08
| + | |
| − | | Keven
| + | |
| − | | K.-C. Wu and D. Marculescu, [http://bacon.cse.ucsc.edu/papers/aspdac_2008/p559_7A-1.pdf Soft Error Rate Reduction Using Redundancy Addition and Removal ], ASPDAC 2008.
| + | |
| − | |-
| + | |
| − | | 2/21/08
| + | |
| − | | Jeff
| + | |
| − | | Liang, X., Turgay, K., and Brooks, D. [http://portal.acm.org/citation.cfm?id=1326073.1326245&coll=&dl=GUIDE&type=series&idx=SERIES388&part=series&WantType=Proceedings&title=ICCAD# Architectural power models for SRAM and CAM structures based on hybrid analytical/empirical techniques]. ICCAD, 2007, pp 824-830.
| + | |
| − | |-
| + | |
| − | | 2/21/08
| + | |
| − | | Jeff
| + | |
| − | | [http://www.ece.ubc.ca/~stevew/papers/html/jssc96/paper.html Cacti]
| + | |
| − | |-
| + | |
| − | | 2/28/08
| + | |
| − | | Mohammed
| + | |
| − | | Wei Huang; Ghosh, S.; Velusamy, S.; Sankaranarayanan, K.; Skadron, K.; Stan, M.R., "[http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=1650228 HotSpot: a compact thermal modeling methodology for early-stage VLSI design]," Very Large Scale Integration (VLSI) Systems, IEEE Transactions on , vol.14, no.5, pp. 501-513, May 2006.
| + | |
| − | |-
| + | |
| − | | 2/28/08
| + | |
| − | | Linh
| + | |
| − | | Xin Li, Taylor, Brian YuTsun Chien, Pileggi, Lawrence T. [http://www.ieeexplore.ieee.org/xpls/abs_all.jsp?isnumber=4397223&arnumber=4397306&count=153&index=82 Adaptive post-silicon tuning for analog circuits: concept, analysis and optimization.] ICCAD 2007, pp 450-457.
| + | |
| − | |-
| + | |
| − | | 3/6/08
| + | |
| − | |
| + | |
| − | | NO MEETING
| + | |
| − | |-
| + | |
| − | | 3/13/08
| + | |
| − | | Janak H. Patel (UIUC)
| + | |
| − | | CMOS Process Variations: A "Critical Operation Point" hypothesis
| + | |
| − | |-
| + | |
| − | |}
| + | |
The reading group will weekly. Students will be selected to present an informal discussion of a chosen paper. Credit (pass/fail only) for the seminar is given based on your participation.
